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參數(shù)資料
型號: 74LCX16841MTDX
廠商: Fairchild Semiconductor
文件頁數(shù): 1/8頁
文件大小: 0K
描述: IC LATCH TRANSP 20BIT LV 56TSSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: 74LCX
邏輯類型: D 型透明鎖存器
電路: 10:10
輸出類型: 三態(tài)
電源電壓: 2 V ~ 3.6 V
獨立電路: 2
延遲時間 - 傳輸: 1.5ns
輸出電流高,低: 24mA,24mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 帶卷 (TR)
2001 Fairchild Semiconductor Corporation
DS012578
www.fairchildsemi.com
October 1995
Revised April 2001
7
4
LCX16841
Low
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20-Bi
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Lat
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ith
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T
o
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nt
Inpu
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74LCX16841
Low Voltage 20-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs
General Description
The LCX16841 contains twenty non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCX16841 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
The LCX16841 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 5.5 ns tPD max (VCC = 3.3V), 20 A ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s
±24 mA output drive (V
CC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model
> 2000V
Machine model
> 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
Package Number
Package Description
74LCX16841MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LCX16841MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OEn
Output Enable Input (Active LOW)
LEn
Latch Enable Input
D0–D19
Inputs
O0–O19
Outputs
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