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參數資料
| 型號： | 74LVC16374ADGG,512 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 2/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 16BIT EDGE TRIG D FF 48TSSOP |
| 產品培訓模塊： | Logic Packages |
| 標準包裝： | 975 |
| 系列： | 74LVC |
| 功能： | 標準 |
| 類型： | D 型總線 |
| 輸出類型： | 三態非反相 |
| 元件數： | 2 |
| 每個元件的位元數： | 8 |
| 頻率 - 時鐘： | 150MHz |
| 延遲時間 - 傳輸： | 7ns |
| 觸發器類型： | 正邊沿 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 1.2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | 74LVC16374ADG 74LVC16374ADG-ND 935235190512 |
74LVC_LVCH16374A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 11 — 16 January 2013
10 of 20
NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
[1]
Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(C
L VCC
2
f
o) = sum of the outputs
tsu
set-up time
nDn to nCP; see Figure 8
VCC = 1.65 V to 1.95 V
4.0
-
4.0
-
ns
VCC = 2.3 V to 2.7 V
3.0
-
3.0
-
ns
VCC = 2.7 V
1.9
-
1.9
-
ns
VCC = 3.0 V to 3.6 V
1.9
0.3
-
1.9
-
ns
th
hold time
nDn to nCP; see Figure 8
VCC = 1.65 V to 1.95 V
3.0
-
3.0
-
ns
VCC = 2.3 V to 2.7 V
2.5
-
2.5
-
ns
VCC = 2.7 V
1.1
-
1.1
-
ns
VCC = 3.0 V to 3.6 V
+1.5
0.3
-
1.5
-
ns
fmax
maximum
frequency
see Figure 7
VCC = 1.65 V to 1.95 V
100
-
80
-
ns
VCC = 2.3 V to 2.7 V
125
-
100
-
ns
VCC = 2.7 V
150
-
120
-
MHz
VCC = 3.0 V to 3.6 V
150
300
-
120
-
MHz
tsk(o)
output skew
time
VCC = 3.0 V to 3.6 V
-
1.0
-
1.5
ns
CPD
power
dissipation
capacitance
per input; VI =GND to VCC
VCC = 1.65 V to 1.95 V
-
14.1
-
pF
VCC = 2.3 V to 2.7 V
-
16.4
-
pF
VCC = 3.0 V to 3.6 V
-
18.5
-
pF
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 74LVC16374ADGG-Q1J | 制造商:NXP Semiconductors 功能描述:74LVC16374ADGG-Q100/TSSOP48/RE 制造商:NXP Semiconductors 功能描述:Flip Flop D-Type Bus Interface Pos-Edge 3-ST 2-Element 48-Pin TSSOP T/R 制造商:NXP Semiconductors 功能描述:74LVC16374ADGG-Q100/TSSOP48/RE - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP FLOP D-TYPE DUAL 48TSSOP |
| 74LVC16374ADGGRG4 | 功能描述:觸發器 16-Bit Edg-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVC16374ADG-T | 功能描述:觸發器 3.3V 16-BIT POS D-TYPE 3-S RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVC16374ADGVRE4 | 功能描述:觸發器 16-Bit Edg-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVC16374ADGVRG4 | 功能描述:觸發器 16B Edge-Triggered D-Type RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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