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參數(shù)資料
型號: 74LVC1G07GW/DG,125
廠商: NXP Semiconductors
文件頁數(shù): 1/18頁
文件大?。?/td> 0K
描述: IC BUFF OPEN DRAIN N-INV 5TSSOP
產(chǎn)品培訓模塊: Logic Packages
標準包裝: 3,000
系列: 74LVC
邏輯類型: 緩沖器/線路驅動器,非反相并帶開漏極
元件數(shù): 1
每個元件的位元數(shù): 1
輸出電流高,低: 32mA,32mA
電源電壓: 2 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
供應商設備封裝: 5-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74LVC1G07GW/DG-G
74LVC1G07GW/DG-G-ND
935283543125
1.
General description
The 74LVC1G07 provides the non-inverting buffer.
The output of this device is an open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall
time.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2.
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24 mA output drive (V
CC =3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from
40 C to +85 C and 40 C to +125 C
74LVC1G07
Buffer with open-drain output
Rev. 11 — 29 June 2012
Product data sheet
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相關代理商/技術參數(shù)
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