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參數(shù)資料
| 型號(hào)： | 74LVC1G99DP,125 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 1/32頁 |
| 文件大小： | 0K |
| 描述： | IC CONFIG MULTI-FUNC GATE 8TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | 74LVC |
| 邏輯類型： | 可配置多功能 |
| 電路數(shù)： | 1 |
| 輸入數(shù)： | 4 |
| 施密特觸發(fā)器輸入： | 是 |
| 輸出類型： | 三態(tài) |
| 輸出電流高，低： | 32mA，32mA |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-TSSOP |
| 包裝： | 帶卷 (TR) |
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1.
General description
The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with
3-state output. The device can be configured as one of several logic functions including,
AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components
are required to configure the device as all inputs can be connected directly to VCC or
GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE
causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the
output state is determined by the signals applied to the Schmitt trigger inputs (A, B, C and
D).
Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input
signals, transforming them into sharply defined, jitter free output signals. By eliminating
leakage current paths to VCC and GND, the inputs and disabled output are also
over-voltage tolerant, making the device suitable for mixed-voltage applications.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.
2.
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24 mA output drive (V
CC =3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from
40 Cto+85 C and 40 C to +125 C.
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Rev. 8 — 5 April 2013
Product data sheet
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVC1G99DP-G | 功能描述:邏輯門 3V 1G LOW-P ULTRA CONFIG GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G99GD | 制造商:NXP Semiconductors 功能描述:Bulk 制造商:NXP Semiconductors 功能描述:IC MUTLIFUNCT GATE 3-ST XSO |
| 74LVC1G99GD,125 | 功能描述:邏輯門 ULTRA-CONFIG MULTI FUNCTION GATE 3-S RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G99GF | 制造商:NXP Semiconductors 功能描述:Cut Tape 制造商:NXP Semiconductors 功能描述:IC MUTLIFUNCT GATE TRI-ST X |
| 74LVC1G99GF,115 | 功能描述:邏輯門 Config 3CIRCUIT 5.5V RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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