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參數資料
| 型號： | 74LVQ4066TTR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 多路復用及模擬開關 |
| 英文描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 257K |
| 代理商： | 74LVQ4066TTR |
1/12
July 2004
s
HIGH SPEED:
tPD = 0.4 ns (TYP.) at VCC = 3.3 V
tPD = 0.1 ns (TYP.) at VCC = 5 V
s
LOW POWER DISSIPATION:
ICC = 2A (MAX.) at TA=25°C
s
LOW "ON " LOW RESISTANCE
RON = 14 at VCC = 3.3V, II/O < 1 mA
RON = 12 at VCC = 5.0V, II/O < 1 mA
s
SINE WAVE DISTORTION:
0.04% at VCC = 3.3V, f = 1KHz
s
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4066
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVQ4066 is a low voltage CMOS QUAD
BILATERAL SWITCH fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
It is ideal for low power and low noise 3.3V
applications and each switch is designed to
handle both analog and digital signals.
The switches permit signals with amplitudes up to
VCC (peak) to be transmitted in either direction
without relevant propagation delay and without
generating additional ground bounce noise.
It has an ON-Resistance which is greatly reduced
in comparison with 74HC4066.
It is provided of four individual enable inputs to
control the switches; the switch is ON when the C
input is held high and OFF (High Impedance)
when C is held low.
All
inputs
and
outputs
are
equipped
with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
74LVQ4066
QUAD BILATERAL SWITCH
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
74LVQ4066MTR
TSSOP
74LVQ4066TTR
TSSOP
SOP
Rev. 8
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| 74V1G66STR | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5 |
| 74V1G66CTR | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5 |
| 74V1G66C-TR | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5 |
| 74V1G66S-TR | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5 |
| 74V1T66S-TR | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5 |
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