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參數資料
| 型號： | 74LVX16245TTR |
| 廠商： | 意法半導體 |
| 英文描述： | 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5V TOLERANT INPUTS |
| 中文描述： | 16位總線收發器和三態輸出，5V容限輸入 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 248K |
| 代理商： | 74LVX16245TTR |
1/10
July 2003
I
HIGH SPEED: t
PD
= 5.3 ns (TYP.) at V
CC
= 3V
5V TOLERANT INPUT
LOW POWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25°C
INPUT VOLTAGE LEVEL: V
IL
= 0.8, V
IH
=2V
AT V
CC
=3V
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.3V (TYP.) AT Vcc=3V
I
I
I
I
I
I
I
I
I
DESCRIPTION
The 74LVX16245 is an advanced high-speed
CMOS 16-BIT BUS TRANSCEIVER (3-STATE)
fabricated
with
sub-micron
double-layer metal wiring C
2
MOS technology.
This IC is intended for two-way asynchronous
communication
between
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the busses are
effectively isolated.
All
inputs
and
outputs
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
silicon
gate
and
data
busses;
the
are
equipped
with
74LVX16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS, 5V TOLERANT INPUTS
ORDER CODES
PACKAGE
TUBE
T & R
TSSOP
74LVX16245TTR
TSSOP
PIN CONNECTION
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