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參數(shù)資料
| 型號(hào)： | 74V2G241STR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DUAL BUS BUFFER NON INVERTED (3-STATE) |
| 中文描述： | 雙總線緩沖器非反相（3態(tài)） |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大小： | 109K |
| 代理商： | 74V2G241STR |
1/9
June 2003
I
HIGH SPEED: t
PD
= 3.8ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1
μ
A(MAX.) at T
A
= 25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
IMPROVED LATCH-UP IMMUNITY
I
I
I
I
I
I
I
DESCRIPTION
The 74V2G241 is an advanced high-speed CMOS
DUAL BUS BUFFER NON INVERTER fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V systems
and it is ideal for portable applications like
personal digital assistant, camcorder and all
battery-powered equipment.
All
inputs
and
outputs
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
are
equipped
with
74V2G241
DUAL BUS BUFFER NON INVERTED (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
T & R
SOT23-8L
74V2G241STR
SOT23-8L
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