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參數(shù)資料
| 型號： | 74VHC14 |
| 廠商： | 意法半導體 |
| 英文描述： | Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85 |
| 中文描述： | 六角施密特逆變器 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大小： | 220K |
| 代理商： | 74VHC14 |
74VHC14
4/11
Table 8: Capacitive Characteristics
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/6 (per gate)
Table 9: Dynamic Switching Characteristics
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Figure 3: Test Circuit
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50
)
Symbol
Parameter
Test Condition
Value
Unit
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
6
10
10
10
pF
14
pF
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
OLP
V
OLV
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
5.0
C
L
= 50 pF
0.3
0.8
V
-0.8
-0.3
V
IHD
5.0
3.5
V
V
ILD
5.0
1.5
V
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