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參數資料
型號: 74VHC573M
廠商: Fairchild Semiconductor
文件頁數: 1/9頁
文件大小: 0K
描述: IC LATCH OCT D-TYPE 3ST 20-SOIC
標準包裝: 36
系列: 74VHC
邏輯類型: D 型透明鎖存器
電路: 8:8
輸出類型: 三態
電源電壓: 2 V ~ 5.5 V
獨立電路: 1
延遲時間 - 傳輸: 4.5ns
輸出電流高,低: 8mA,8mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 20-SOIC
包裝: 管件
產品目錄頁面: 1213 (CN2011-ZH PDF)
tm
74VHC573
Octal
D-T
ype
Latc
h
with
3-ST
A
TE
Outputs
May 2007
1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74VHC573 Rev. 1.3
74VHC573
Octal D-Type Latch with 3-STATE Outputs
Features
High Speed: tPD = 5.0ns (Typ.) at VCC = 5V
High Noise Immunity: VNIH = VNIL = 28% VCC (Min.)
Power Down Protection is provided on all inputs
Low Noise: VOLP = 0.6V (Typ.)
Low Power Dissipation: ICC = 4A (Max.) @ TA = 25°C
Pin and function compatible with 74HC573
General Description
The VHC573 is an advanced high speed CMOS octal
latch with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while main-
taining the CMOS low power dissipation. This 8-bit
D-type latch is controlled by a latch enable input (LE)
and an Output Enable input (OE). When the OE input is
HIGH, the eight outputs are in a high impedance state.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Description
Order Number
Package
Number
Package Description
74VHC573M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC573SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC573MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pin Names
Description
D0–D7
Data Inputs
LE
Latch Enable Input
OE
3-STATE Output Enable Input
O0–O7
3-STATE Outputs
相關PDF資料
PDF描述
74VHC373M IC LATCH OCTAL D-TYPE 20-SOIC
1546212-8 TERM BLOCK HEADER 8POS VERT 5MM
1546210-8 TERM BLOCK HEADER 8POS R/A 5MM
1776165-3 TERM BLOCK HEADER 3POS VERT SHRD
1776164-3 TERM BLOCK HEADER 3POS VERT SHRD
相關代理商/技術參數
參數描述
74VHC573M 制造商:Fairchild Semiconductor Corporation 功能描述:74VHC CMOS SMD 74VHC573 SOIC20
74VHC573M_Q 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74VHC573MSCX 制造商:NATSEM 功能描述:
74VHC573MTC 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74VHC573MTC_Q 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
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