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參數資料
| 型號： | 75323 |
| 廠商： | 友順科技股份有限公司 |
| 英文描述： | LINEAR INTEGRATED CIRCUIT |
| 中文描述： | 線性集成電路 |
| 文件頁數： | 6/10頁 |
| 文件大小： | 177K |
| 代理商： | 75323 |
UTC 75323
LINEAR INTEGRATED CIRCUIT
UTC
UNISONIC TECHNOLOGIES CO., LTD.
6
QW-R113-007,A
SWITCHING CHARACTERISTICS
(Ta=25
℃
,VCC=5V,VDD=12V,VSS= -12V)
PARAMETER
Propagation delay time, low-to high-level output
Propagation delay time, high- to low-level output
Transition time, low-to high-level output
Transition time, high- to low-level output
PARAMETER MEASUREMENT INFORMATION
I
OS(L)
SYMBOL
t
PLH
t
PHL
t
TLH
t
THL
TEST CONDITIONS
CL=50pF,RL=5k
Ω
See Figure 6
MIN
TYP MAX UNIT
107
500
42
150
175
525
16
60
ns
ns
ns
ns
-I
OS(H)
V
DD
or GND
Vss or GND
R
L
=3k
Ω
Vo
Vss
V
DD
Vcc
V
I
Figure 1. Driver Test Circuit
for V
OH
,V
OL
,I
OS(H)
,and I
OS(L)
Vss
V
DD
Vcc
I
IH
V
I
V
I
-I
IL
Figure 2. Driver Test Circuit for I
IH
and I
IL
1.5V
1.5V
t
PHL
Input
Output
90%
50%
10%
t
THL
t
TLH
V
OL
V
OH
0V
3V
t
PLH
90%
50%
10%
TEST CIRCUIT
NOTES:A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics(t
W
=25
μ
s,PRR=20kHz,Zo=50
Ω
,tr=tf<50ns)
VOLTAGE WAVEFORMS
Figure 3. Driver Test Circuit and Voltage Waveforms
Figure 4. Receiver Test Circuit for Ios
Figure 5. Receiver Test Circuit for VIT,VOH,and VOL
Vss
VDD
Vcc
pulse
Generator
See Note B
Input
Vo
C
L
( see Note A )
R
L
Vss
VDD
Vcc
V
I
-I
OS
Vss
VDD
Vcc
V
IT
,V
I
V
OL
I
OL
V
OH
-I
OH
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