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參數資料
| 型號： | 75425-EP |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | POWER GOOD FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS |
| 中文描述： | 電源良好快速瞬態響應2 -低壓差電壓調節器 |
| 文件頁數： | 21/27頁 |
| 文件大小： | 388K |
| 代理商： | 75425-EP |
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TPS75201-EP TPS75215-EP TPS75218-EP TPS75225-EP TPS75233-EP WITH RESET
TPS75401-EP
’
75415-EP
’
75418-EP
’
75425-EP
’
75433-EP WITH POWER GOOD
FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS
SGLS165
–
APRIL 2003
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
THERMAL INFORMATION
thermally enhanced TSSOP-20 (PWP
–
PowerPad
)
The thermally enhanced PWP package is based on the 20-pin TSSOP, but includes a thermal pad [see
Figure 25(c)] to provide an effective thermal contact between the IC and the PWB.
Traditionally, surface mount and power have been mutually exclusive terms. A variety of scaled-down TO220-type
packages have leads formed as gull wings to make them applicable for surface-mount applications. These
packages, however, suffer from several shortcomings: they do not address the very low profile requirements (<2
mm) of many of today
’
s advanced systems, and they do not offer a pin-count high enough to accommodate
increasing integration. On the other hand, traditional low-power surface-mount packages require power-dissipation
derating that severely limits the usable range of many high-performance analog circuits.
The PWP package (thermally enhanced TSSOP) combines fine-pitch surface-mount technology with thermal
performance comparable to much larger power packages.
The PWP package is designed to optimize the heat transfer to the PWB. Because of the very small size and limited
mass of a TSSOP package, thermal enhancement is achieved by improving the thermal conduction paths that
remove heat from the component. The thermal pad is formed using a lead-frame design (patent pending) and
manufacturing technique to provide the user with direct connection to the heat-generating IC. When this pad is
soldered or otherwise coupled to an external heat dissipator, high power dissipation in the ultrathin, fine-pitch,
surface-mount package can be reliably achieved.
DIE
Side View (a)
End View (b)
Bottom View (c)
DIE
Thermal
Pad
Figure 25. Views of Thermally Enhanced PWP Package
Because the conduction path has been enhanced, power-dissipation capability is determined by the thermal
considerations in the PWB design. For example, simply adding a localized copper plane (heat-sink surface), which
is coupled to the thermal pad, enables the PWP package to dissipate 2.5 W in free air (reference
Figure 27(a), 8 cm
2
of copper heat sink and natural convection). Increasing the heat-sink size increases the power
dissipation range for the component. The power dissipation limit can be further improved by adding airflow to a
PWB/IC assembly (see Figures 26 and 27). The line drawn at 0.3 cm
2
in Figures 26 and 27 indicates performance
at the minimum recommended heat-sink size, illustrated in Figure 29.
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