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參數資料
| 型號： | 75HVD07 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | MS3420-12 |
| 中文描述： | 高輸出RS - 485收發 |
| 文件頁數： | 10/19頁 |
| 文件大小： | 220K |
| 代理商： | 75HVD07 |
SN65HVD05, SN65HVD06, SN65HVD07
SN75HVD05, SN75HVD06, SN75HVD07
SLLS533B
–
MAY 2002
–
REVISED MAY 2003
www.ti.com
10
1.5 V
tPZH(2)
1.5 V
3 V
0 V
VOH
GND
VI
VO
0 V or 1.5 V
1.5 V or 0 V
A at 1.5 V
B at 0 V
S1 to B
tPZL(2)
1.5 V
VOL
VO
A at 0 V
B at 1.5 V
S1 to A
50
Generator: PRR = 100 kHz,
50% Duty Cycle,
tr <6 ns, tf <6 ns, Zo = 50
VO
RE
CL = 15 pF
±
20%
CL Includes Fixture and
Instrumentation Capacitance
VI
DE
1 k
±
1%
A
B
S1
Input
Generator
R
0 V
A
B
VCC
VCC
Figure 10. Receiver Enable Time From Standby (Driver Disabled)
Pulse Generator,
15
μ
s Duration,
1% Duty Cycle
tr, tf
≤
100 ns
100
±
1%
_
+
A
B
R
D
DE
RE
0 V or 3 V
NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified.
3 V or 0 V
Figure 11. Test Circuit, Transient Over Voltage Test
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