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參數資料
| 型號： | 853054AL |
| 英文描述： | 4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER |
| 中文描述： | 4:1，差分至3.3V或2.5V的LVPECL / ECL時鐘復用器 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 207K |
| 代理商： | 853054AL |
Integrated
Circuit
Systems, Inc.
853054AG
www.icst.com/products/hiperclocks.html
REV. A JANUARY 5, 2006
1
ICS853054
4:1, D
IFFERENTIAL
-
TO
-3.3V
OR
2.5V
LVPECL/ECL C
LOCK
M
ULTIPLEXER
PRELIMINARY
G
ENERAL
D
ESCRIPTION
The ICS853054 is an 4:1 Differential-to-3.3V or
2.5V LVPECL/ECL Clock Multiplexer which
can operate up to 2.5GHz and is a member of
the HiPerClockS family of High Performance
Clock Solutions from ICS. The ICS853054 has 4
selectable differential clock inputs. The PCLKx, nPCLKx in-
put pairs can accept LVPECL, LVDS, CML or SSTL levels.
The fully differential architecture and low propagation
delay make it ideal for use in clock distribution circuits. The
select pins have internal pulldown resistors. The SEL1 pin is
the most significant bit and the binary number applied to the
select pins will select the same numbered data input (i.e., 00
selects PCLK0, nPCLK0).
F
EATURES
High speed 4:1 differential multiplexer
One differential 3.3V or 2.5V LVPECL output
Four selectable differential PCLK, nPCLK inputs
PCLKx, nPCLKx pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
Maximum output frequency: 3.2GHz
Translates any single ended input signal to
LVPECL levels with resistor bias on nPCLKx input
Part-to-part skew: TBD
Propagation delay: 465ps (typical)
Additive phase jitter, RMS: 0.238ps (typical)
LVPECL mode operating voltage supply range:
V
CC
= 2.375V to 3.465V, V
EE
= 0V
ECL mode operating voltage supply range:
V
CC
= 0V, V
EE
= -3.465V to -2.375V
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS-compliant
packages
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
HiPerClockS
ICS
PCLK0
nPCLK0
PCLK1
nPCLK1
V
CC
SEL0
SEL1
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Q
nQ
V
EE
nPCLK3
PCLK3
nPCLK2
PCLK2
ICS853054
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm package body
G Package
Top View
PCLK0
nPCLK0
PCLK1
nPCLK1
PCLK2
nPCLK2
PCLK3
nPCLK3
00
11
01
10
SEL1
SEL0
Q
nQ
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
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