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參數資料
| 型號： | 854S057BGILF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LOW SKEW CLOCK DRIVER, PDSO20 |
| 封裝： | ROHS COMPLIANT, MO-153, TSSOP-20 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 761K |
| 代理商： | 854S057BGILF |
ICS854S057BGI REVISION A MARCH 29, 2010
1
2010 Integrated Device Technology, Inc.
DATA SHEET
4:1 or 2:1 LVDS Clock Multiplexer with
Internal Input Termination
ICS854S057BI
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
nPCLK1
VT1
PCLK1
SEL0
SEL1
nPCLK0
VT0
PCLK0
VDD
GND
VDD
PCLK3
VT3
nPCLK3
Q
nQ
PCLK2
VT2
nPCLK2
GND
General Description
The ICS854S057BI is a 4:1 or 2:1 LVDS Clock
Multiplexer which can operate up to 2GHz. The PCLK,
nPCLK pairs can accept most standard differential
input levels. Internal termination is provided on each
differential input pair. The ICS854S057BI operates
using a 2.5V supply voltage. The fully differential architecture and
low propagation delay make it ideal for use in high speed
multiplexing applications. The select pins have internal pulldown
resistors. Leaving one input unconnected (pulled to logic low by the
internal resistor) will transform the device into a 2:1 multiplexer. The
SEL1 pin is the most significant bit and the binary number applied to
the select pins will select the same numbered data input (i.e., 00
selects PCLK0, nPCLK0).
Features
High speed differential multiplexer. The device can be configured
as either a 4:1 or 2:1 multiplexer
One LVDS output pair
Four selectable PCLK, nPCLK inputs with internal termination
PCLKx, nPCLKx pairs can accept the following differential
input levels: LVPECL, LVDS, CML, SSTL
Maximum output frequency: >2GHz
Part-to-part skew: 200ps (maximum)
Propagation delay: 800ps (maximum)
Additive phase jitter, RMS: 0.065ps (typical)
Full 2.5V power supply
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
HiPerClockS
ICS
0 0
0 1
1 0
1 1
Q
nQ
VT0
PCLK0
nPCLK0
SEL1
SEL0
50
VT1
PCLK1
nPCLK1
50
VT2
PCLK2
nPCLK2
50
VT3
PCLK3
nPCLK3
50
Pulldown
Pin Assignment
ICS854S057BI
20-Lead TSSOP
4.4mm x 6.5mm x 0.925mm package body
G Package
Top View
Block Diagram
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 854S057BGILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 4-IN LVDS 20-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:20 TSSOP (LEAD-FREE) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:4:1 or 2:1 LVDS Clk Multiplexer w/int |
| 854S058AGILF | 功能描述:編碼器、解碼器、復用器和解復用器 DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 854S058AGILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 8-IN LVDS 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:SMALL SIGE ARRAY - Bulk 制造商:Integrated Device Technology Inc 功能描述:DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX |
| 854S1208AYILF | 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP Tray 制造商:Integrated Device Technology Inc 功能描述:CLOCK MLTPLXR - Trays |
| 854S1208AYILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP T/R |
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