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參數資料
| 型號： | 89LS8252 |
| 廠商： | Atmel Corp. |
| 英文描述： | 8-Bit Microcontroller with 8K Bytes Flash |
| 中文描述： | 8位具有8K字節的閃存，微控制器 |
| 文件頁數： | 1/31頁 |
| 文件大小： | 470K |
| 代理商： | 89LS8252 |
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AT89LS8252
4-137
8-Bit
Microcontroller
with 8K Bytes
Flash
AT89LS8252
Features
Compatible with MCS-51
Products
8K Bytes of In-System Reprogrammable Downloadable Flash Memory
- SPI Serial Interface for Program Downloading
- Endurance: 1,000 Write/Erase Cycles
2K Bytes EEPROM
- Endurance: 100,000 Write/Erase Cycles
2.7V to 6V Operating Range
Fully Static Operation: 0 Hz to 12 MHz
Three-Level Program Memory Lock
256 x 8 bit Internal RAM
32 Programmable I/O Lines
Three 16 bit Timer/Counters
Nine Interrupt Sources
Programmable UART Serial Channel
SPI Serial Interface
Low Power Idle and Power Down Modes
Interrupt Recovery From Power Down
Programmable Watchdog Timer
Dual Data Pointer
Power Off Flag
Description
The AT89LS8252 is a low-power, wide-voltage range, high-performance CMOS 8-bit
microcomputer with 8K bytes of Downloadable Flash programmable and erasable
read only memory and 2K bytes of EEPROM. The device is manufactured using
Atmel’s high density nonvolatile memory technology and is compatible with the indus-
try standard 80C51 instruction set and pinout. The on-chip Downloadable Flash
allows the program memory to be reprogrammed in-system through an SPI serial
interface or by a conventional nonvolatile memory programmer. By combining a ver-
satile 8-bit CPU with Downloadable Flash on a monolithic chip, the Atmel
AT89LS8252 is a powerful microcomputer which provides a highly flexible and cost
effective solution to many embedded control applications.
The AT89LS8252 provides the following standard features: 8K bytes of Downloadable
Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable watch-
dog timer, two Data Pointers, three 16-bit timer/counters, a six-vector two-level inter-
rupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In
addition, the AT89LS8252 is designed with static logic for operation down to zero fre-
quency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt sys-
tem to continue functioning. The Power Down Mode saves the RAM contents but
freezes the oscillator, disabling all other chip functions until the next interrupt or hard-
ware reset.
The Downloadable Flash can be changed a single byte at a time and is accessible
through the SPI serial interface. Holding RESET active forces the SPI bus into a serial
programming interface and allows the program memory to be written to or read from
unless Lock Bit 2 has been activated.
0850B-B–12/97
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