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參數(shù)資料
| 型號： | 9179YM-12LFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 1K X 1 SYNCHRONOUS DRAM, PDSO28 |
| 封裝： | ROHS COMPLIANT, SOIC-28 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 229K |
| 代理商： | 9179YM-12LFT |
Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9179- 12
0264E—12/09/08
Block Diagram
PentiumPro is a trademark of Intel Corporation
I
2C is a trademark of Philips Corporation
3 DIMM Buffer
Pin Configuration
The ICS9179-12 is a buffer intended for reduced pin count
2 - chip Intel BX chipset designs
An I
2C interface is included, enabling individual outputs to be
turned on or off. With 13 outputs, up to 3 DIMMs are supported.
Thirteen high speed, low noise buffers, supports up to
three SDRAM DIMMs.
Buffer outputs skew matched to within 250 ps.
I
2C Serial Configuration interface to allow individual
OUTPUTs to be stopped low.
Multiple VDD, VSS pins for noise reduction
3.3V±5% supply voltage
28-pin SOIC and SSOP package
Propagation delay between 1 to 5.5ns
Operation to 133MHz at 3.3V±5%
28-Pin SOIC and SSOP
* Internal pull-up resistor of 100K
Ohms to 3.3V on indicated inputs
Power Groups
VDD (0:4), GND (0:4) = Power supply for OUTPUT buffer
VDDI, GNDI = Power supply for I
2C circuitry
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