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參數資料
| 型號： | 9214YG-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9214 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-28 |
| 文件頁數： | 5/16頁 |
| 文件大小： | 224K |
| 代理商： | 9214YG-T |
13
Integrated
Circuit
Systems, Inc.
ICS9214
0809G—08/02/08
Figure 7. Cycle-to-cycle Duty Cycle Error
Figure 6. Short-term Jitter
Figure 5. Cycle-to-cycle Jitter
Power Sequencing
Supply voltages for the ICS9214 must be applied before, or at the same time and external input and output signals.
Figure 8. Input frequency Modulation
tCYCLE,i
tJ = tCYCLE,
t4CYCLE, i
tJ = t4CYCLE, i - t4CYCLE
Cycle (i)
Cycle (i+1)
tPW+ (i)
tCYCLE (i)
tPW+ (i+1)
tCYCLE (i+1)
tDC,ERR =tPW+(i) - tPW+(i+1) and tPW-(i) - tPW-(i+1)
tPW- (i)
tPW- (i+1)
ODCLK_T
ODCLK_C
fNOM
(1-PM,IN)*fNOM
0.5/fM,IN
1/fM,IN
t
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