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參數資料
型號: 933715320118
廠商: NXP SEMICONDUCTORS
元件分類: 多路復用及模擬開關
英文描述: TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
封裝: SO, SOT-109, SO-16
文件頁數: 10/22頁
文件大小: 217K
代理商: 933715320118
Philips Semiconductors - PIP - 74HC/HCT4053; Triple 2-channel analog multiplexer/demultiplexer
Product Information
74HC/HCT4053; Triple 2-
channel analog
multiplexer/demultiplexer
Information as of 2003-04-22
Stay informed
Download datasheet
Block diagram
topGeneral description
The 74HC/HCT4053 are high-speed Si-gate CMOS devices and are pin compatible with the '4053' of the '4000B' series. They
are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4053 are triple 2-channel analog multiplexers/demultiplexers with a common enable input (E). Each
multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital
select inputs (S1
to S3).
With E LOW, one of the two switches is selected (low impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high impedance OFF-state, independent of S1 to S3 .
VCC and GND are the supply voltage pins for the digital control inputs (S1, to S3, and E). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (nY0
and nY1, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HC4053N.html (1 of 5) [Apr-29-2003 2:25:28 PM]
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相關PDF資料
PDF描述
933669760652 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDIP16
933670390112 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDIP16
935166800112 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
935186940112 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
935186940118 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
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