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參數資料
| 型號： | 934055224118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | 9.6 A, 25 V, 0.021 ohm, N-CHANNEL, Si, POWER, MOSFET, MS-012AA |
| 封裝： | PLASTIC, SO-8 |
| 文件頁數： | 1/9頁 |
| 文件大小： | 123K |
| 代理商： | 934055224118 |
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHN1018
Logic level FET
FEATURES
SYMBOL
QUICK REFERENCE DATA
’Trench’ technology
V
DSS = 25 V
Low on-state resistance
Fast switching
I
D = 9.6 A
Low-profile surface mount
package
R
DS(ON) ≤ 18 m (VGS = 10 V)
Logic level compatible
R
DS(ON) ≤ 21 m (VGS = 5 V)
GENERAL DESCRIPTION
PINNING
SOT96-1 (SO8)
N-channel
enhancement
mode
PIN
DESCRIPTION
logic
level
field-effect
power
transistor in a surface mounting
1-3
source
plastic
package
using
’trench’
technology.
4
gate
Application:-
5-8
drain
High
frequency
computer
motherboard d.c. to d.c. converters
The PHN1018 is supplied in the
SOT96-1 (SO8) surface mounting
package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
Drain-source voltage
T
j = 25 C to 150C
-
25
V
DGR
Drain-gate voltage
T
j = 25 C to 150C;
-
25
V
R
GS = 20 k
V
GS
Gate-source voltage (DC)
-
± 15
V
GSM
Gate-source voltage (pulse peak
-
± 20
V
value)
I
D
Drain current (t
p ≤ 10 s)
T
a = 25 C
-
9.6
A
T
a = 70 C
-
7.7
A
I
DM
Drain current (pulse peak value)
T
a = 25 C
-
38
A
P
tot
Total power dissipation
T
a = 25 C
-
2.5
W
T
a = 70 C
-
1.6
W
T
j, Tstg
Operating junction and storage
-
- 55
150
C
temperature
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-a
Thermal resistance junction
Surface mounted, FR4 board, t
≤ 10 sec
-
50
K/W
to ambient
R
th j-a
Thermal resistance junction
Surface mounted, FR4 board
150
-
K/W
to ambient
d
g
s
12
34
5
6
7
8
pin 1 index
October 1999
1
Rev 1.200
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