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參數資料
| 型號： | 934055649118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | 68 A, 55 V, 0.014 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁數： | 1/10頁 |
| 文件大?。?/td> | 92K |
| 代理商： | 934055649118 |
Philips Semiconductors
Product specification
TrenchMOS
transistor
BUK9614-55
Logic level FET
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode logic
SYMBOL
PARAMETER
MAX.
UNIT
level field-effect power transistor in a
plastic envelope suitable for surface
V
DS
Drain-source voltage
55
V
mounting. Using ’trench’ technology
I
D
Drain current (DC)
68
A
the device features very low on-state
P
tot
Total power dissipation
142
W
resistance and has integral zener
T
j
Junction temperature
175
C
diodes giving ESD protection up to
R
DS(ON)
Drain-source on-state
14
m
2kV. It is intended for use in
resistance
V
GS = 5 V
automotive and general purpose
switching applications.
PINNING - SOT404
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
mb
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Drain-source voltage
-
55
V
DGR
Drain-gate voltage
R
GS = 20 k
-55
V
±V
GS
Gate-source voltage
-
10
V
I
D
Drain current (DC)
T
mb = 25 C
-
68
A
I
D
Drain current (DC)
T
mb = 100 C
-
48
A
I
DM
Drain current (pulse peak value)
T
mb = 25 C
-
240
A
P
tot
Total power dissipation
T
mb = 25 C
-
142
W
T
stg, Tj
Storage & operating temperature
-
- 55
175
C
ESD LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
C
Electrostatic discharge capacitor
Human body model
-
2
kV
voltage
(100 pF, 1.5 k
)
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-mb
Thermal resistance junction to
-
1.05
K/W
mounting base
R
th j-a
Thermal resistance junction to
Minimum footprint, FR4
50
-
K/W
ambient
board
d
g
s
13
mb
2
April 1998
1
Rev 1.000
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