
1997 Jan 06
14
Philips Semiconductors
Preliminary specication
Digital Video Encoder (ConDENC)
SAA7120; SAA7121
Slave Receiver
Table 7
Subaddress 26 and 27
Table 8
Subaddress 28 and 29
Table 9
Subaddress 2A to 2D
Table 10 Subaddress 2E
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
WSS
wide screen signalling bits:
13 to 11 = reserved
10 to 8 = subtitles
7 to 4 = enhanced services
3 to 0 = aspect ratio
WSSON
0
wide screen signalling output is disabled
1
wide screen signalling output is enabled
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
REMARKS
BS
starting point of burst in clock cycles
PAL : BS = 33 (21H)
NTSC : BS = 25 (19H)
BE
ending point of burst in clock cycles
PAL : BS = 29 (1DH)
NTSC : BS = 29 (1DH)
DECCOL
0
disable colour detection bit of RTCI input
1
enable colour detection bit of RTCI input
bit RTCE must be set to 1 (see Fig.10)
DECFIS
0
eld sequence as FISE in subaddress 61
1
eld sequence as FISE bit in RTCI input
bit RTCE must be set to 1 (see Fig.10)
DATA BYTE
DESCRIPTION
REMARKS
CGO0
rst byte of Copy guard data, odd eld
LSBs of the respective bytes are encoded
immediately after run-in and framing code, the
MSBs of the respective bytes have to carry the
parity bit, in accordance with the denition of
Line 20 encoding format.
CGO1
second byte of Copy guard data, odd eld
CGE0
rst byte of Copy guard data, even eld
CGE1
second byte of Copy guard data, even eld
DATA BYTE
DESCRIPTION
CCEN1
CCEN0
0
copy guard encoding off
0
1
enables encoding in eld 1 (odd)
1
0
enables encoding in eld 2 (even)
1
enables encoding in both elds