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參數(shù)資料
| 型號(hào)： | 935250320518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁(yè)數(shù)： | 31/31頁(yè) |
| 文件大小： | 186K |
| 代理商： | 935250320518 |
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1997 Nov 17
9
Philips Semiconductors
Product specication
10-bit analog-to-digital interface for
CCD cameras
TDA8786; TDA8786A
GAGC(max)
maximum gain of AGC
circuit
AGC DAC input
code =
≥319 (9-bit control)
33.5
dB
VAGCOUT
AGC output amplier black
level voltage
1.1
V
Vinex(p-p)
voltage at soft clipper
inexion point
(peak-to-peak value)
soft clipper 4-bit control
DAC input code = 00
40%
VAGCOUT(p-p)
V
soft clipper 4-bit control
DAC input code = 15
100%
VAGCOUT(p-p)
V
CRsc
soft clipper compression
ratio
Vi(sc) <Vinex
1.0
Vi(sc) >Vinex
0.66
CLAMPS
gmADC
ADC clamps
transconductance
at clamp level
60
mS
gmPBK
PBK clamp
transconductance
at clamp level
60
mS
gmCDS
CDS clamps
transconductance
at clamp level
5.5
mS
VPBIN(clamp)
clamp voltage
at PBIN input
1.4
V
Analog-to-Digital Converter; ADC
fCLK(max)
maximum clock frequency
18
MHz
tCPH
clock pulse width HIGH
15
ns
tCPL
clock pulse width LOW
15
ns
SRCLK
clock input slew rate
(rising and falling edge)
10 to 90%
0.5
V/ns
Vi(ADC)(p-p)
ADC input voltage level
(peak-to-peak value)
1.8
V
VRB
ADC reference voltage
output code 0
1.4
V
VRT
ADC reference voltage
output code 1023
3.2
V
IADCIN
input current pin 10
2
+2
A
ILE
integral linearity error
fCLK = 18 MHz; ramp input
±1.0
±2.0
LSB
DLE
differential linearity error
fCLK = 18 MHz; ramp input
±0.4
±0.75
LSB
td(s)
sampling delay time
5ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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