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參數資料
| 型號： | 935250320557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數： | 29/31頁 |
| 文件大小： | 186K |
| 代理商： | 935250320557 |
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1997 Nov 17
7
Philips Semiconductors
Product specication
10-bit analog-to-digital interface for
CCD cameras
TDA8786; TDA8786A
CHARACTERISTICS
VCCA =VCCD = 4.75 V; VCCO = 2.6 V; fCLK = 18 MHz; Tamb =25 °C; unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VCCA
analog supply voltage
4.5
4.75
5.5
V
VCCD
digital supply voltage
4.5
4.75
5.5
V
VCCO
digital outputs supply
voltage
2.5
2.6
5.5
V
ICCA
analog supply current
83
mA
ICCD
digital supply current
16
mA
ICCO
digital outputs supply
current
CL = 20 pF on all data
outputs; ramp input
1
mA
Digital inputs
CLOCK INPUT: CLK (REFERENCED TO DGND)
VIL
LOW-level input voltage
0
0.8
V
VIH
HIGH-level input voltage
2.0
VCCD
V
IIL
LOW-level input current
VCLK = 0.8 V
1
+1
A
IIH
HIGH-level input current
VCLK = 2.0 V
20
A
Zi
input impedance
fCLK = 18 MHz
2
k
Ci
input capacitance
fCLK = 18 MHz
2
pF
INPUTS: CDSP1 AND CDSP2
VIL
LOW-level input voltage
0
0.6
V
VIH
HIGH-level input voltage
2.2
VCCD
V
IIL
LOW-level input current
VIL = 0.6 V
100
A
IIH
HIGH-level input current
VIH = 2.2 V
0
A
INPUTS: SEN, STDBY, CLPCDS, CLPOPB, PBK AND CLPADC
VIL
LOW-level input voltage
0
0.6
V
VIH
HIGH-level input voltage
2.2
VCCD
V
Ii
input current
2
+2
A
INPUTS: SEN, SDATA AND SCLK (see Fig.14)
tsu1
SEN set-up time compared
to SCLK rising edge
4
ns
tsu2
SDATA set-up time
compared to SCLK rising
edge
4
ns
tsu3
SEN set-up time compared
to SCLK falling edge
4
ns
thd3
SEN hold time compared
to SCLK rising edge
4
ns
thd4
SDATA hold time
compared to SCLK rising
edge
4
ns
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