
2000 Mar 08
44
Philips Semiconductors
Product specication
Digital video encoder
SAA7128H; SAA7129H
Notes
1. At maximum supply voltage with highly active input signals.
2. The data is for both input and output direction.
3. If an internal oscillator is used, crystal deviation of nominal frequency is directly proportional to the deviation of
subcarrier frequency and line/field frequency.
4. For full digital range, without load, VDDA = 3.3 V. The typical voltage swing is 1.35 V, the typical minimum output
voltage (digital zero at DAC) is 0.2 V.
5. Referring to peak-to-peak analog voltages resulting from identical peak-to-peak digital codes.
Crystal oscillator
fn
nominal frequency (usually 27 MHz)
3rd harmonic
30
MHz
f/f
n
permissible deviation of nominal
frequency
note 3
50
+50
106
CRYSTAL SPECIFICATION
Tamb
ambient temperature
0
70
°C
CL
load capacitance
8
pF
RS
series resistance
80
Cmot
motional capacitance (typical)
1.5
20%
1.5 + 20%
fF
Cpar
parallel capacitance (typical)
3.5
20%
3.5 + 20%
pF
Data and reference signal output timing
CL
output load capacitance
7.5
40
pF
th
output hold time
4
ns
td
output delay time
18
ns
Outputs: C, VBS, CVBS and RGB
Vo(p-p)
output signal voltage (peak-to-peak value) note 4
1.25
1.50
V
inequality of output signal voltages
note 5
2%
Rint
internal serial resistance
1
3
RL
output load resistance
75
300
B
output signal bandwidth of DACs
3dB
10
MHz
LElf(i)
low frequency integral linearity error of
DACs
±3
LSB
LElf(d)
low frequency differential linearity error of
DACs
±1
LSB
td(pipe)(MP)
total pipeline delay from MP port
27 MHz
82
LLC
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT