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參數(shù)資料
| 型號： | 935260938551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, SOT-205, QFP-44 |
| 文件頁數(shù)： | 7/26頁 |
| 文件大小： | 197K |
| 代理商： | 935260938551 |
1998 Feb 05
15
Philips Semiconductors
Objective specication
Multimedia video data acquisition circuit
SAA5284
Fig.6 Motorola mode interface read cycle timing.
(1) Event A occurs when LDS + CS0 + CS1 = 0 (boolean).
(2) Event B occurs when LDS + CS0 + CS1 = 1 (boolean).
handbook, full pagewidth
MGK148
D7 to D0
A2 to A0
LDS
A
(1)
B
(2)
DTACK
t1
t2
t6
t4
t5
t3
t7
t0
valid address
valid data
3-state
R/W
CS1 or CS0
Table 6
Motorola-mode interface read cycle timing (12 MHz clock)
SYMBOL
DESCRIPTION
MIN.
MAX.
UNIT
t0
minimum cycle time
333
833
ns
t1
address set-up time before event A
0
ns
t2
address hold time after event B
0
ns
t3
data hold time from event B
0
ns
t4
data settling time
88
712
ns
t5
data valid to DTACK LOW
83
170
ns
t6
LDS HIGH to DTACK HIGH
83
212
ns
t7
delay between cycles
83
ns
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