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參數資料
| 型號： | 935261504518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, SOT-307, QFP-44 |
| 文件頁數： | 42/87頁 |
| 文件大小： | 440K |
| 代理商： | 935261504518 |
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1999 Jul 01
47
Philips Semiconductors
Product specication
9-bit video input processor
SAA7113H
Table 22 Description of I2C-bus format; note 1
Notes
1. The SAA7113H supports the ‘fast mode’ I2C-bus specification extension (data rate up to 400 kbits/s).
2. If more than one byte DATA is transmitted the subaddress pointer is automatically incremented.
CODE
DESCRIPTION
S
START condition
Sr
repeated START condition
Slave address W
0100 1010 (= 4AH, default) or 0100 1000 (= 48H, if pin RTS0 strapped to ground via a 3.3 k
resistor)
Slave address R
0100 1011 (= 4BH, default) or 0100 1001 (= 49H, if pin RTS0 strapped to ground via a 3.3 k
resistor)
ACK-s
acknowledge generated by the slave
ACK-m
acknowledge generated by the master
Subaddress
subaddress byte; see Table 24
Data
data byte; see Table 24; note 2
P
STOP condition
X = LSB slave
address
read/write control bit; X = 0, order to write (the circuit is slave receiver); X = 1, order to read
(the circuit is slave transmitter)
Subaddresses
00H chip version
read only
01H to 05H front-end part
read and write
06H to 13H decoder part
read and write
14H reserved
15H to 17H decoder part
read and write
18H to 1EH reserved
1FH video decoder status byte
read only
20H to 3FH reserved
40H to 60H general purpose data slicer
read and write
60H to 62H general purpose data slicer status read only
63H to FFH reserved
Fig.34 Read procedure (combined format).
handbook, full pagewidth
ACK-s
ACK-m
SLAVE ADDRESS R
MHB340
P
Sr
ACK-s
DATA
SUBADDRESS
SLAVE ADDRESS W
S
data transferred
(n bytes + acknowledge)
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