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參數資料
| 型號： | 935262255551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 封裝： | PLASTIC, SOT-317-2, QFP-64 |
| 文件頁數： | 19/40頁 |
| 文件大小： | 250K |
| 代理商： | 935262255551 |
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1999 Feb 24
26
Philips Semiconductors
Product specication
Triple high-speed Analog-to-Digital
Converter (ADC)
TDA8752A
t-td(CLKO)
between samples operated in
the same supply and
temperature conditions
0.1
0.3
ns
Data timing (see Fig.11); fCLK = 100 MHz; CL = 10 pF; note 2
td(s)
sampling delay time
referenced to CKADCO
ns
td(o)
output delay time
3.3
2.6
ns
th(o)
output hold time
4.6
5.5
ns
3-state output delay time; (see Fig.12)
tdZH
output enable HIGH
12
ns
tdZL
output enable LOW
10
ns
tdHZ
output disable HIGH
50
ns
tdLZ
output disable LOW
65
ns
PLL clock output
VOL
LOW-level output voltage
Io =1mA
0.3
0.8
V
VOH
HIGH-level output voltage
Io = 1 mA
2.4
3.5
V
IOL
LOW-level output current
VOL = 0.4 V
2
mA
IOH
HIGH-level output current
VOH = 2.7 V
0.4
mA
ADC data outputs
VOL
LOW-level output voltage
Io =1mA
0
0.8
V
VOH
HIGH-level output voltage
Io = 1 mA
2.4
VCCD
V
IOL
LOW-level output current
VOL = 0.4 V
2
mA
IOH
HIGH-level output current
VOH = 2.7 V
0.4
mA
TTL digital inputs (CKREF, COAST, CKEXT, INV, HSYNC and CLP)
VIL
LOW-level input voltage
0.8
V
VIH
HIGH-level input voltage
2.0
V
IIL
LOW-level input current
VIL = 0.4 V
400
A
IIH
HIGH-level input current
VIH = 2.7 V
100
A
Zi
input impedance
4
k
Ci
input capacitance
4.5
pF
3-wire serial bus
trst
reset time of the chip before
3-wire communication
600
ns
tsu
data set-up time
100
ns
th
data hold time
100
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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