- 您現在的位置：買賣IC網 > PDF目錄36343 > 935276541518 (NXP SEMICONDUCTORS) SPECIALTY ANALOG CIRCUIT, PDSO16 PDF資料下載
參數資料
| 型號： | 935276541518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | 7.50 MM, LEAD FREE, PLASTIC, SOT162-1, SO-16 |
| 文件頁數： | 5/34頁 |
| 文件大?。?/td> | 251K |
| 代理商： | 935276541518 |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
2003 Jan 27
13
Philips Semiconductors
Product specication
8-bit A/D and D/A converter
PCF8591
8.3
System conguration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
8.4
Acknowledge
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.
Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by
the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is
addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW
during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the
transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a stop condition.
MBA605
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER /
RECEIVER
SDA
SCL
Fig.14 System configuration.
Fig.15 Acknowledgement on the I2C-bus.
handbook, full pagewidth
MBC602
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
相關PDF資料 |
PDF描述 |
|---|---|
| 935276541512 | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 933768140518 | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 933768130112 | SPECIALTY ANALOG CIRCUIT, PDIP16 |
| 933768140512 | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 935277468112 | 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO8 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 935277864112 | 制造商:NXP Semiconductors 功能描述:IC CPU |
| 935278818112 | 制造商:NXP Semiconductors 功能描述:LCD DRVR 20DIGIT 2.5V/3.3V/5V 56-Pin VSO Tube |
| 935280517132 | 制造商:NXP Semiconductors 功能描述:IC TRANSLATING BUFFER 6XSON |
| 935281751112 | 制造商:NXP Semiconductors 功能描述:IC BUFFER/DVR 16BIT 3ST 48TSSOP |
| 935281751118 | 制造商:NXP Semiconductors 功能描述:IC BUFFER/DVR 16BIT 3ST 48TSSOP |
發布緊急采購，3分鐘左右您將得到回復。