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參數資料
| 型號： | 94211AFLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 0.300 INCH, GREEN, MO-118, SSOP-48 |
| 文件頁數： | 1/18頁 |
| 文件大小： | 157K |
| 代理商： | 94211AFLF |
Integrated
Circuit
Systems, Inc.
ICS94211
0441E—11/17/04
Pin Configuration
Recommended Application:
440BX/VIA Apollo Pro133/ ALI 1631 style chipset.
Output Features:
2 - CPUs @2.5V
1 - IOAPIC @ 2.5V
13 - SDRAM @ 3.3V
6 - PCI @3.3V,
1 - 48MHz, @3.3V
1 - 24MHz @ 3.3V
2 - REF @3.3V, 14.318MHz.
Features:
Programmable ouput frequency.
Programmable ouput rise/fall time.
Programmable PCICLK, PCICLK_F,
SDRAM skew.
Real time system reset output
Spread spectrum for EMI control typically by 7dB to
8dB,
with programmable spread percentage.
Watchdog timer technology to reset system
if over-clocking causes malfunction.
Uses external 14.318MHz crystal.
FS pins for frequency select
Key Specifications:
CPU – CPU: <175ps
SDRAM - SDRAM: <500ps
PCI – PCI: <500ps
CPU(early)-PCI: Min=1.0ns, Typ=2.0ns, Max=4.0ns
Programmable System Frequency Generator for PII/III
Block Diagram
48-Pin 300mil SSOP
*
Internal Pull-up Resistor of 120K to VDD
** Internal Pull-down resistor of 120K to GND
Functionality
3
S
F2
S
F1
S
F0
S
F
U
P
C
)
z
H
M
(
K
L
C
I
C
P
)
z
H
M
(
0000
0
.
0
80
0
.
0
4
000
1
0
.
5
70
5
.
7
3
00
1
0
1
3
.
3
85
6
.
1
4
00
11
2
8
.
6
61
4
.
3
01
0
.
3
0
13
3
.
4
3
01
1
0
.
2
1
14
3
.
7
3
01
1
0
1
0
.
8
61
0
.
4
3
0
111
3
2
.
0
11
4
.
3
1
000
0
.
0
2
10
0
.
0
4
10
0
1
9
.
4
1
13
3
.
8
3
10
9
.
9
0
16
6
.
6
3
10
1
0
.
5
0
10
0
.
5
3
11
00
0
.
0
4
10
0
.
5
3
11
0
1
0
.
0
5
10
5
.
7
3
111
0
.
4
2
10
0
.
1
3
1111
9
.
2
3
15
2
.
3
PCI_STOP#
PLL2
PLL1
Spread
Spectrum
48MHz
24MHz
IOAPIC
CPUCLK (1:0)
RESET#
SDRAM (12:0)
PCICLK (4:0)
PCICLK_F
X1
X2
BUFFER IN
XTAL
OSC
PCI
CLOCK
DIVDER
STOP
SDATA
SCLK
FS(3:0)
MODE
Control
Logic
Config.
Reg.
/2
REF(1:0)
2
13
5
4
VDDREF
*PCI_STOP/REF0
GND
X1
X2
VDDPCI
*MODE/PCICLK_F
**FS3/PCICLK0
GND
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
BUFFER_IN
GND
SDRAM12_F
SDRAM11
VDDSDR
SDRAM10
SDRAM9
GND
SDATA
SCLK
VDDLAPIC
IOAPIC
REF1/FS2*
GND
CPUCLK0
CPUCLK1
VDDLCPU
RESET#
SDRAM0
GND
SDRAM1
SDRAM2
VDDSDR
SDRAM3
SDRAM4
GND
SDRAM5
SDRAM6
VDDSDR
SDRAM7
SDRAM8
VDD48
48MHz/FS0*
24MHz/FS1*
ICS94211
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