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參數資料
| 型號： | 95V847AGIT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封裝： | 0.173 INCH, 0.65 MM PITCH, MO-153, TSSOP-24 |
| 文件頁數： | 1/11頁 |
| 文件大小： | 145K |
| 代理商： | 95V847AGIT |
Integrated
Circuit
Systems, Inc.
ICS95V847
0718D—04/08/05
Block Diagram
PLL
FB_INT
FB_INC
CLK_INC
CLK_INT
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Pin Configuration
24-Pin TSSOP
Recommended Application:
Zero Delay Board Fan Out, SO-DIMM
Provides complete DDR registered DIMM solution
with ICSSSTV16857, ICSSSTV16859 or
ICSSSTV32852
Product Description/Features:
Low skew, low jitter PLL clock driver
1 to 5 differential clock distribution (SSTL_2)
Feedback pins for input to output synchronization
Spread Spectrum tolerant inputs
Switching Characteristics:
CYCLE - CYCLE jitter: <60ps
OUTPUT - OUTPUT skew: <60ps
Period jitter: ±30ps
DUTY CYCLE: 49.5% - 50.5%
Functionality
S
T
U
P
N
IS
T
U
P
T
U
O
e
t
a
t
S
L
P
D
V
AT
N
I
_
K
L
CC
N
I
_
K
L
CT
K
L
CC
K
L
CT
T
U
O
_
B
FC
T
U
O
_
B
F
D
N
GL
H
L
H
L
H
f
o
/
d
e
s
a
p
y
B
D
N
GH
L
H
L
H
L
f
o
/
d
e
s
a
p
y
B
V
5
.
2
)
m
o
n
(
LH
L
H
L
H
n
o
V
5
.
2
)
m
o
n
(
HL
H
L
H
L
n
o
4.40 mm. Body, 0.65 mm. pitch
GND
CLKC0
CLKT0
GND
VDD
CLK_INT
CLK_INC
AVDD
AGND
CLKC1
CLKT1
VDD
CLKT4
CLKC4
CLKC3
CLKT3
VDD
FB_INT
FB_INC
FB_OUTC
FB_OUTT
CLKT2
CLKC2
GND
ICS95V
8
47
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
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PDF描述 |
|---|---|
| 95V847AGLF | 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 95V847AGT | 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 95V847AGLFT | 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 95V847AG | 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 95V847YGLF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO8 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 95V847AGLF | 功能描述:時鐘驅動器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V847AGLFT | 功能描述:時鐘驅動器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V847AGLF-T | 制造商:INTEGRATED DEVICE TECHNOLOGY 功能描述: |
| 95V847AGT | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 45MHz to 233MHz 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:1:5, 2.5V Phase-Lock Loop Clock Driver |
| 95V850AGLF | 功能描述:時鐘驅動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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