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參數資料
型號: A3PN125-1VQ100I
元件分類: FPGA
英文描述: FPGA, 3072 CLBS, 125000 GATES, PQFP100
封裝: 14 X 14 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, VQFP-100
文件頁數: 5/106頁
文件大小: 3324K
代理商: A3PN125-1VQ100I
Datasheet Information
4- 2
R e v ision 8
Revision 8
(continued)
Values for tDDRISUD and FDDRIMAX were updated in Table 2-62 Input DDR
Propagation Delays. Values for FDDOMAX were added to Table 2-64 Output DDR
Resource were updated with available information.
through
Revision 7
(January 2010)
All product tables and pin tables were updated to show clearly that A3PN030 is
available only in the Z feature at this time, as A3PN030Z. The nano-Z feature
grade devices are designated with a Z at the end of the part number.
N/A
The "68-Pin QFN" and "100-Pin VQFP" pin tables for A3PN030 were removed.
Only the Z grade for A3PN030 is available at this time.
N/A
Revision 6
(August 2009)
The note for A3PN030 in the "ProASIC3 nano Devices" table was revised. It
states A3PN030 is available in the Z feature grade only.
Revision 5
(March 2009)
The "68-Pin QFN" pin table for A3PN030 is new.
3-7
The "48-Pin QFN", "68-Pin QFN", and "100-Pin VQFP" pin tables for A3PN030Z
are new.
The "100-Pin VQFP" pin table for A3PN060Z is new.
The "100-Pin VQFP" pin table for A3PN125Z is new
The "100-Pin VQFP" pin table for A3PN250Z is new.
Revision 4
(February 2009)
The "100-Pin VQFP" pin table for A3PN030 is new.
3-10
Revision 3
(February 2009)
All references to speed grade –F were removed from this document.
N/A
The"I/Os with Advanced I/O Standards" section was revised to add definitions of
hot-swap and cold-sparing.
The "100-Pin VQFP" pin table for A3PN030 is new.
3-10
Revision 2
(November 2008)
The "ProASIC3 nano Devices" table was revised to change the maximum user
I/Os for A3PN020 and A3PN030. The following table note was removed: "Six chip
(main) and three quadrant global networks are available for A3PN060 and
above."
The QN100 package was removed for all devices.
N/A
The "100-Pin QFN" section was removed.
N/A
Revision 1
(October 2008)
The A3PN030 device was added to product tables and replaces A3P030 entries
that were formerly in the tables.
I to IV
The "I/Os Per Package" table was updated to add the following information to
table note 4: "For nano devices, the VQ100 package is offered in both leaded and
RoHS-compliant versions. All other packages are RoHS-compliant only."
updated to remove QN100 for A3PN250.
The "General Description" section was updated to give correct information about
number of gates and dual-port RAM for ProASIC3 nano devices.
Revision
Changes
Page
相關PDF資料
PDF描述
A3PN125-1VQ100 FPGA, 3072 CLBS, 125000 GATES, PQFP100
A3PN125-1VQG100I FPGA, 3072 CLBS, 125000 GATES, PQFP100
A3PN125-1VQG100 FPGA, 3072 CLBS, 125000 GATES, PQFP100
A3PN125-2VQ100I FPGA, 3072 CLBS, 125000 GATES, PQFP100
A3PN125-2VQ100 FPGA, 3072 CLBS, 125000 GATES, PQFP100
相關代理商/技術參數
參數描述
A3PN125-1VQG100 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ProASIC3 nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數:- 邏輯元件/單元數:792 RAM 位總計:- 輸入/輸出數:120 門數:30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
A3PN125-1VQG100I 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ProASIC3 nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數:- 邏輯元件/單元數:792 RAM 位總計:- 輸入/輸出數:120 門數:30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
A3PN125-2VQ100 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ProASIC3 nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數:- 邏輯元件/單元數:792 RAM 位總計:- 輸入/輸出數:120 門數:30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
A3PN125-2VQ100I 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ProASIC3 nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數:- 邏輯元件/單元數:792 RAM 位總計:- 輸入/輸出數:120 門數:30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
A3PN125-2VQG100 功能描述:IC FPGA NANO 125K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ProASIC3 nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數:- 邏輯元件/單元數:792 RAM 位總計:- 輸入/輸出數:120 門數:30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
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