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參數資料
型號: A40MX04-3PL84IX79
元件分類: FPGA
英文描述: FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC84
封裝: PLASTIC, LCC-84
文件頁數: 36/124頁
文件大小: 3142K
代理商: A40MX04-3PL84IX79
40MX and 42MX FPGA Families
v6.1
1-13
Development Tool Support
The MX family of FPGAs is fully supported by both Actel's
Libero Integrated Design Environment and Designer
FPGA Development software. Actel Libero IDE is a design
management environment that streamlines the design
flow. Libero IDE provides an integrated design manager
that seamlessly integrates design tools while guiding the
user through the design flow, managing all design and
log files, and passing necessary design data among tools.
Additionally, Libero IDE allows users to integrate both
schematic and HDL synthesis into a single flow and verify
the entire design in a single environment. Libero IDE
includes Synplify for Actel from Synplicity, ViewDraw
for Actel from Mentor Graphics, ModelSim HDL
Simulator from Mentor Graphics, WaveFormer Lite
from SynaptiCAD, and Designer software from Actel.
Refer to the Libero IDE flow (located on Actel’s website)
diagram for more information.
Actel's Designer software is a place-and-route tool and
provides a comprehensive suite of backend support tools
for FPGA development. The Designer software includes
timing-driven
place-and-route,
and
a
world-class
integrated static timing analyzer and constraints editor.
With the Designer software, a user can lock his/her
design pins before layout while minimally impacting the
results
of
place-and-route.
Additionally,
the
back-
annotation flow is compatible with all the major
simulators and the simulation results can be cross-probed
with Silicon Explorer II, Actel’s integrated verification
and logic analysis tool. Another tool included in the
Designer software is the ACTgen macro builder, which
easily
creates
popular
and
commonly
used
logic
functions for implementation into your schematic or HDL
design. Actel's Designer software is compatible with the
most popular FPGA design entry and verification tools
from companies such as Mentor Graphics, Synplicity,
Synopsys, and Cadence Design Systems. The Designer
software is available for both the Windows and UNIX
operating systems.
Actel's Designer software is compatible with the most
popular FPGA design entry and verification tools from
companies such as Mentor Graphics, Synplicity, Synopsys,
and Cadence Design Systems. The Designer software is
available for both the Windows and UNIX operating
systems.
Related Documents
Application Notes
User’s Guides and Manuals
Miscellaneous
相關PDF資料
PDF描述
A40MX04-3PL84I FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC84
A40MX04-3PL84X79 FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC84
A40MX04-3PL84 FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC84
A40MX04-3PQ100IX79 FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQFP100
A40MX04-3PQ100I FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQFP100
相關代理商/技術參數
參數描述
A40MX04-3PL84M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
A40MX04-3PLG44 功能描述:IC FPGA MX SGL CHIP 6K 44-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:MX 標準包裝:90 系列:ProASIC3 LAB/CLB數:- 邏輯元件/單元數:- RAM 位總計:36864 輸入/輸出數:157 門數:250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設備封裝:256-FPBGA(17x17)
A40MX04-3PLG44I 功能描述:IC FPGA MX SGL CHIP 6K 44-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:MX 標準包裝:90 系列:ProASIC3 LAB/CLB數:- 邏輯元件/單元數:- RAM 位總計:36864 輸入/輸出數:157 門數:250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設備封裝:256-FPBGA(17x17)
A40MX04-3PLG68 功能描述:IC FPGA MX SGL CHIP 6K 68-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:MX 標準包裝:90 系列:ProASIC3 LAB/CLB數:- 邏輯元件/單元數:- RAM 位總計:36864 輸入/輸出數:157 門數:250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設備封裝:256-FPBGA(17x17)
A40MX04-3PLG68I 功能描述:IC FPGA MX SGL CHIP 6K 68-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:MX 標準包裝:90 系列:ProASIC3 LAB/CLB數:- 邏輯元件/單元數:- RAM 位總計:36864 輸入/輸出數:157 門數:250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設備封裝:256-FPBGA(17x17)
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