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參數資料
| 型號： | AA1L4Z |
| 廠商： | NEC Corp. |
| 英文描述： | COMPOUND TRANSISTOR |
| 中文描述： | 復合晶體管 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 81K |
| 代理商： | AA1L4Z |
2002
Document No. D16164EJ1V0DS00 (1st edition)
Date Published April 2002 N CP(K)
Printed in Japan
COMPOUND TRANSISTOR
AA1L4Z
on-chip resistor NPN silicon epitaxial transistor
For mid-speed switching
DATA SHEET
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
FEATURES
On-chip bias resistor
(R
1
= 47 k
)
Complementary transistor with AN1L4Z
ABSOLUTE MAXIMUM RATINGS (Ta = 25
°
C)
Parameter
Symbol
Ratings
Unit
Collector to base voltage
V
CBO
60
V
Collector to emitter voltage
V
CEO
50
V
Emitter to base voltage
V
EBO
5
V
Collector current (DC)
I
C(DC)
100
mA
Collector current (Pulse)
I
C(pulse)
*
200
mA
Total power dissipation
P
T
250
mW
Junction temperature
T
j
150
°
C
Storage temperature
* PW
≤
10 ms, duty cycle
≤
50 %
T
stg
55 to +150
°
C
PACKAGE DRAWING (UNIT: mm)
ELECTRICAL CHARACTERISTICS (Ta = 25
°
C)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Collector cutoff current
I
CBO
V
CB
= 50 V, I
E
= 0
100
nA
DC current gain
h
FE1
**
V
CE
= 5.0 V, I
C
= 5.0 mA
135
270
600
DC current gain
h
FE2
**
V
CE
= 5.0 V, I
C
= 50 mA
100
260
Collector saturation voltage
V
CE(sat)
**
I
C
= 5.0 mA, I
B
= 0.25 mA
0.05
0.2
V
Low level input voltage
V
IL
**
V
CE
= 5.0 V, I
C
= 100
μ
A
0.57
0.5
V
High level input voltage
V
IH
**
V
CE
= 0.2 V, I
C
= 5.0 mA
4.0
1.7
V
Input resistance
R
1
32.9
47
61.1
k
Turn-on time
t
on
0.2
μ
s
Storage time
t
stg
5.0
μ
s
Turn-off time
**Pulse test PW
≤
350
μ
s, duty cycle
≤
2 %
t
off
V
CC
= 5.0 V, R
L
= 1.0 k
V
I
= 5.0 V, PW = 2.0
μ
s
duty cycle
≤
2 %
6.0
μ
s
h
FE
CLASSIFICATION
Marking
h
FE1
Q
P
K
135 to 270
200 to 400
300 to 600
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