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參數資料
型號: AD5504BRUZ
廠商: Analog Devices Inc
文件頁數: 1/20頁
文件大小: 0K
描述: IC DAC 12BIT SPI 16-TSSOP
產品培訓模塊: DAC Architectures
設計資源: Powering a 30V DAC from a 3V supply (CN0193)
標準包裝: 1
設置時間: 45µs
位數: 12
數據接口: SPI?、QSPI?、MICROWIRE? 和 DSP
轉換器數目: 4
電壓電源:
工作溫度: -40°C ~ 105°C
安裝類型: *
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: *
包裝: 管件
輸出數目和類型: 4 電壓,單極
采樣率(每秒): *
High Voltage, Quad-Channel
12-Bit Voltage Output DAC
Data Sheet
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2009-2012 Analog Devices, Inc. All rights reserved.
FEATURES
Quad-channel high voltage DAC
12-bit resolution
Pin selectable 30 V or 60 V output range
Integrated precision reference
Low power serial interface with readback capability
Integrated temperature sensor alarm function
Power-on reset
Simultaneous updating via LDAC
Wide operating temperature: 40°C to +105°C
APPLICATIONS
Programmable voltage sources
High voltage LED drivers
Receiver bias in optical communications
GENERAL DESCRIPTION
The AD5504 is a quad-channel, 12-bit, serial input, digital-to-
analog converter with on-chip high voltage output amplifiers
and an integrated precision reference. The DAC output voltage
ranges are programmable via the range select pin (R_SEL). If
R_SEL is held high, the DAC output ranges are 0 V to 30 V. If
R_SEL is held low, the DAC output ranges are 0 V to 60 V. The
on-chip output amplifiers allow an output swing within the
range of AGND + 0.5 V to VDD 0.5 V.
The AD5504 has a high speed serial interface, which is com-
patible with SPI-, QSPI-, MICROWIRE-, and DSP-interface
standards and can handle clock speeds of up to 16.667 MHz.
FUNCTIONAL BLOCK DIAGRAM
07994-
001
POWER-ON
RESET
DGND
AGND
SDO
SCLK
SDI
SYNC
LDAC
ALARM
CLR R_SEL VLOGIC
VDD
REFERENCE
AD5504
DACA
INPUT
REGISTER
A
DAC
REGISTER
A
VOUTA
+
1713k
122.36k
12
DAC B
INPUT
REGISTER
B
DAC
REGISTER
B
VOUTB
+
1713k
122.36k
12
DAC C
INPUT
REGISTER
C
DAC
REGISTER
C
VOUTC
+
1713k
122.36k
12
DAC D
INPUT
REGISTER
D
DAC
REGISTER
D
VOUTD
+
1713k
122.36k
12
TEMPERATURE
SENSOR
POWER-DOWN
CONTROL LOGIC
INPUT
CONTROL
LOGIC
Figure 1.
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