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參數資料
| 型號： | AD652SQ |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 11/28頁 |
| 文件大?。?/td> | 779K |
| 描述： | IC V-F CONV SYNCH MONO 5V 16CDIP |
| 標準包裝： | 1 |
| 類型： | 電壓至頻率 |
| 頻率 - 最大： | 2MHz |
| 全量程： | ±25ppm/°C |
| 線性： | ±0.005% |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-CDIP（0.300"，7.62mm） |
| 供應商設備封裝： | 16-CDIP |
| 包裝： | 管件 |
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AD652
Rev. C | Page 11 of 28
NC = NO CONNECT
5
7
8
NC
V
IN
+
NC NC
6
9
10
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
10k&
10k&
16k&
4k&
A. PLCC 0V TO 10V INPUT
5
7
8
NC
NC
NC
6
9
10
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
10k&
10k&
16k&
4k&
B. PLCC 0V TO 8V INPUT
V
IN
+
5
7
8
NC
NC NC
6
9
10
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
10k&
10k&
16k&
4k&
C. PLCC 0V TO 5V INPUT
V
IN
+
5
7
8
NC
V
IN
?SPAN class="pst AD652SQ_2632819_4">5V
NC
6
9
10
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
10k&
10k&
16k&
4k&
D. PLCC?/SPAN>5V INPUT
5V REF
20
Figure 13.
PLCC CONNECTIONS
The PLCC packaged AD652 offers additional input resistors not
found on the CERDIP-packaged device. These resistors provide
the user with additional input voltage ranges. Besides the 10 V
range available using the on-chip resistor in the CERDIP the
PLCC also offers 8 V and 5 V ranges. Figure 13A to Figure 13C
show the proper connections for these ranges with positive
input voltages. For negative input voltages, the appropriate
resistor should be tied to analog ground and the input voltage
should be applied to Pin 6, the + input of the op amp.
Bipolar input voltages can be accommodated by injecting
250 礎 into Pin 5 with the use of the 5 V reference and the
input resistors. For the ? V or ?.5 V range, the reference
output, Pin 20, should be tied to Pin 10. The input signal should
then be applied to Pin 8 for a ? V signal and to Pin 7 for a
?.5 V signal. The input connections for a ? V range are
shown in Figure 13D. For a ? V range, the input signal should
be applied to Pin 9, and Pin 20 should be connected to Pin 8.
GAIN AND OFFSET CALIBRATION
The gain error of the AD652 is laser trimmed to within ?.5%.
If higher accuracy is required, the internal 20 k& resistor must
be shunted with a 2 M& resistor to produce a parallel equivalent
that is 1% lower in value than the nominal 20 k&. Full-scale
adjustment is then accomplished using a 500 & series trimmer.
See Figure 14 and Figure 15. When negative input voltages are
used, this 500 & trimmer is tied to ground and Pin 6 is the
input pin.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ONE
SHOT
AND
"D"
FLOP
Q CK
D
Q
1mA
20k&
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
5V
REFERENCE
V
IN
+V
S
0.02?/SPAN>F
2M&
500&
250k&
20k&
Figure 14. CERDIP Gain and Offset Trim
4
5
6
7
8
18
17
16
15
14
9
10
11
12
13
3
2
1
20
19
1mA
5V
REFERENCE
AD652
AND
"D"
FLOP
Q
CK
D
Q
ONE
SHOT
10k&
10k&
16k&
4k&
SYNCHRONOUS
VOLTAGE-TO-FREQUENCY
CONVERTER
V
IN
500&
500&
2M&
0.02?/SPAN>F
20k&
350k&
?SPAN class="pst AD652SQ_2632819_4">3.5mV
OFFSET
TRIM
Figure 15. PLCC Gain and Offset Trim
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD652SQ/883B | 功能描述:電壓頻率轉換及頻率電壓轉換 IC - SYNC V/F CONVERTER RoHS:否 制造商:Texas Instruments 全標度頻率:4000 KHz 線性誤差:+/- 1 % FSR 電源電壓-最大: 電源電壓-最小: 最大工作溫度:+ 85 C 最小工作溫度:- 25 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-14 封裝:Tube |
| AD652SQ/883B2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Monolithic Synchronous Voltage-to-Frequency Converter |
| AD652SQ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Monolithic Synchronous Voltage-to-Frequency Converter |
| AD652SQ883B2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Monolithic Synchronous Voltage-to-Frequency Converter |
| AD652SW | 制造商:AD 制造商全稱:Analog Devices 功能描述:Monolithic Synchronous Voltage-to-Frequency Converter |
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