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參數資料
| 型號： | AD7357WYRUZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 2-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | ROHS COMPLIANT, MO-153AB, TSSOP-16 |
| 文件頁數： | 1/20頁 |
| 文件大小： | 469K |
| 代理商： | AD7357WYRUZ-RL |
Differential Input, Dual, Simultaneous
Sampling, 4.2 MSPS, 14-Bit, SAR ADC
AD7357
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009–2011 Analog Devices, Inc. All rights reserved.
FEATURES
Dual 14-bit SAR ADC
Simultaneous sampling
Throughput rate: 4.2 MSPS per channel
Specified for a VDD of 2.5 V
Power dissipation: 36 mW at 4.2 MSPS
On-chip reference: 2.048 V ± 0.25%, 6 ppm/°C
Dual conversion with read
High speed serial interface
SPI-/QSPI-/MICROWIRE-/DSP-compatible
40°C to +125°C operation
16-lead TSSOP package
Qualified for automotive applications
APPLICATIONS
Automotive radar
Data acquisition systems
Motion control
I & Q demodulation
RFID readers
FUNCTIONAL BLOCK DIAGRAM
SCLK
AD7357
14-BIT
SUCCESSIVE
APPROXIMATION
ADC
14-BIT
SUCCESSIVE
APPROXIMATION
ADC
CONTROL
LOGIC
SDATAA
CS
SDATAB
DGND
REFGND
AGND
VDRIVE
VDD
AGND
T/H
BUF
REF
VINA+
VINA–
REFA
VINB+
VINB–
REFB
0
7757-
001
Figure 1.
GENERAL DESCRIPTION
The AD73571 is a dual, 14-bit, high speed, low power, successive
approximation analog-to-digital converter (ADC) that operates
from a single 2.5 V power supply and features throughput rates
up to 4.2 MSPS. The part contains two ADCs, each preceded by
a low noise, wide bandwidth track-and-hold circuit that can
handle input frequencies in excess of 110 MHz.
The conversion process and data acquisition use standard
control inputs allowing for easy interfacing to microprocessors
or DSPs. The input signal is sampled on the falling edge of CS; a
conversion is also initiated at this point. The conversion time is
determined by the SCLK frequency.
The AD7357 uses advanced design techniques to achieve very
low power dissipation at high throughput rates. With a 2.5 V
supply and a 4.2 MSPS throughput rate, the part consumes 14 mA
typically. The part also offers flexible power/throughput rate
management options.
The analog input range for the part is the differential common
mode ±VREF/2. The AD7357 has an on-chip 2.048 V reference
that can be overdriven when an external reference is preferred.
The AD7357 is available in a 16-lead thin shrink small outline
package (TSSOP).
PRODUCT HIGHLIGHTS
1.
Two Complete ADC Functions.
These functions allow simultaneous sampling and conversion
of two channels. The conversion result of both channels is
simultaneously available on separate data lines or in suc-
cession on one data line if only one serial port is available.
2.
High Throughput with Low Power Consumption.
The AD7357 offers a 4.2 MSPS throughput rate with
36 mW power consumption.
3.
Simultaneous Sampling.
The part features two standard successive approximation
ADCs with accurate control of the sampling instant via a
CS input and once off conversion control.
Table 1. Related Devices
Generic
Resolution
Throughput
Analog Input
12-bit
5 MSPS
Differential
12-bit
3 MSPS
Differential
12-bit
2 MSPS
Differential/single-ended
12-bit
1 MSPS
Single-ended
12-bit
1 MSPS
Single-ended bipolar
14-bit
1 MSPS
Single-ended bipolar
1 Protected by U.S. Patent No. 6,681,332.
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