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| 型號(hào)： | AD7609BSTZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 18-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP64 |
| 封裝： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁(yè)數(shù)： | 1/35頁(yè) |
| 文件大小： | 1737K |
| 代理商： | AD7609BSTZ-RL |
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8-Channel Differential DAS with 18-Bit,
Bipolar, Simultaneous Sampling ADC
Preliminary Technical Data
AD7609
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2011 Analog Devices, Inc. All rights reserved.
FEATURES
8 simultaneously sampled inputs
True differential inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5.25 V VDRIVE
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
18-bit ADC with 200 kSPS on all channels
Oversampling capability with digital filter
Flexible parallel/serial interface
SPI/QSPI/MICROWIRE/DSP compatible
Performance
7 kV ESD rating on analog input channels
98 dB SNR, 107 dB THD
Dynamic range: up to 105 dB typical
Low power: 100 mW
Standby mode: 25 mW
64-lead LQFP package
APPLICATIONS
Power line monitoring and protection systems
Multiphase motor control
Instrumentation and control systems
Multiaxis positioning systems
Data acquisition systems (DAS)
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Resolution
Single-
Ended
Inputs
True
Differential
Inputs
Number of
Simultaneous
Sampling Channels
18 Bits
8
16 Bits
8
6
4
14 Bits
8
FUNCTIONAL BLOCK DIAGRAM
V1+
V1–
RFB
1M
CLAMP
T/H
V2+
V2–
1M
CLAMP
T/H
V3+
V3–
1M
CLAMP
T/H
V4+
V4–
1M
CLAMP
T/H
V5+
V5–
1M
CLAMP
T/H
V6+
V6–
1M
CLAMP
T/H
V7+
V7–
1M
CLAMP
T/H
V8+
V8–
1M
CLAMP
T/H
8:1
MUX
AGND
BUSY
FRSTDATA
CONVST A CONVST B RESET RANGE
CONTROL
INPUTS
CLK OSC
REFIN/REFOUT
REF SELECT
AGND
OS 2
OS 1
OS 0
DOUTA
DOUTB
RD/SCLK
CS
PAR/SER SEL
VDRIVE
18-BIT
SAR
DIGITAL
FILTER
PARALLEL/
SERIAL
INTERFACE
2.5V
REF
REFCAPB REFCAPA
SERIAL
PARALLEL
REGCAP
2.5V
LDO
REGCAP
2.5V
LDO
AVCC
DB[15:0]
AD7609
09
76
0-
0
01
SECOND
ORDER LPF
SECOND
ORDER LPF
SECOND
ORDER LPF
SECOND
ORDER LPF
SECOND
ORDER LPF
SECOND
ORDER LPF
SECOND
ORDER LPF
SECOND
ORDER LPF
Figure 1.
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