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參數(shù)資料
| 型號(hào)： | AD7610BCPZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC |
| 中文描述： | 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, QCC48 |
| 封裝： | 7 X 7 MM, LEAD FREE, MO-220VKKD-2, LFCSP-48 |
| 文件頁數(shù)： | 23/32頁 |
| 文件大小： | 591K |
| 代理商： | AD7610BCPZ-RL |
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AD7610
INTERFACES
DIGITAL INTERFACE
The AD7610 has a versatile digital interface that can be set up
as either a serial or a parallel interface with the host system. The
serial interface is multiplexed on the parallel data bus. The AD7610
digital interface also accommodates 2.5 V, 3.3 V, or 5 V logic. In
most applications, the OVDD supply pin is connected to the host
system interface 2.5 V to 5.25 V digital supply. Finally, by using
the OB/2C input pin, both twos complement or straight binary
coding can be used.
Two signals, CS and RD, control the interface. When at least
one of these signals is high, the interface outputs are in high
impedance. Usually, CS allows the selection of each AD7610
in multicircuit applications and is held low in a single AD7610
design. RD is generally used to enable the conversion result on
the data bus.
RESET
The RESET input is used to reset the AD7610. A rising edge on
RESET aborts the current conversion (if any) and tristates the
data bus. The falling edge of RESET resets the AD7610 and clears
the data bus and configuration register. See Figure 34 for the
RESET timing details.
Rev. 0 | Page 23 of 32
RESET
DATA
BUS
BUSY
CNVST
t
8
t
9
0
Figure 34. RESET Timing
PARALLEL INTERFACE
The AD7610 is configured to use the parallel interface when
SER/PAR is held low.
Master Parallel Interface
Data can be continuously read by tying CS and RD low, thus
requiring minimal microprocessor connections. However, in
this mode, the data bus is always driven and cannot be used in
shared bus applications (unless the device is held in RESET).
Figure 35 details the timing for this mode.
t
1
BUSY
DBUS
PREVIOUS CONVERSION DATA
NEW DATA
CNVST
CS = RD = 0
t
10
t
4
t
11
t
3
0
Figure 35. Master Parallel Data Timing for Reading (Continuous Read)
Slave Parallel Interface
In slave parallel reading mode, the data can be read either after
each conversion, which is during the next acquisition phase, or
during the following conversion, as shown in Figure 36 and
Figure 37, respectively. When the data is read during the conver-
sion, it is recommended that it is read only during the first half
of the conversion phase. This avoids any potential feedthrough
between voltage transients on the digital interface and the most
critical analog conversion circuitry.
CURRENT
CONVERSION
t
13
t
12
BUSY
DATA
BUS
RD
CS
0
Figure 36. Slave Parallel Data Timing for Reading (Read After Convert)
PREVIOUS
CONVERSION
t
13
t
12
t
3
BUSY
DATA
BUS
CNVST,
RD
CS = 0
t
4
t
1
0
Figure 37. Slave Parallel Data Timing for Reading (Read During Convert)
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| AD7610BSTZ | 功能描述:IC ADC 16BIT 250KSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7610BSTZ-RL | 功能描述:IC ADC 16BIT 250KSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7611ACP | 制造商:Analog Devices 功能描述:1MSPS, 16-BIT ADC S/W PROG. INPUT RANGES - Bulk |
| AD7611AST | 制造商:Analog Devices 功能描述:1MSPS, 16-BIT ADC S/W PROG. INPUT RANGES - Bulk |
| AD7612 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC |
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