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參數(shù)資料
| 型號(hào)： | AD7660 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:4; Series:D38999; Body Material:Metal; Connecting Termination:Crimp; Connector Shell Size:13; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:13-4 |
| 中文描述： | 16位，100 kSPS的的CMOS模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大小： | 218K |
| 代理商： | AD7660 |
REV. 0
AD7660
–15–
PARALLEL INTERFACE
The AD7660 is configured to use the parallel interface when the
SER/
PAR
is held low. The data can be read either after each
conversion, which is during the next acquisition phase, or during
the following conversion as shown, respectively, in Figure 14 and
Figure 15. When the data is read during the conversion, how-
ever, it is recommended, that it is read only during the first half
of the conversion phase. That avoids any potential feedthrough
between voltage transients on the digital interface and the most
critical analog conversion circuitry.
SERIAL INTERFACE
The AD7660 is configured to use the serial interface when the
SER/
PAR
is held high. The AD7660 outputs 16 bits of data,
MSB first, on the SDOUT pin. This data is synchronized with
the 16 clock pulses provided on the SCLK pin.
t
1
t
3
t
4
t
11
CNVST
BUSY
DATA BUS
CS
=
RD
= 0
t
10
PREVIOUS CONVERSION DATA
NEW DATA
Figure 13. Master Parallel Data Timing for Reading (Continuous Read)
CURRENT
CONVERSION
BUSY
DATA BUS
CS
RD
t
12
t
13
Figure 14. Slave Parallel Data Timing for Reading (Read after Convert)
PREVIOUS
CONVERSION
t
1
t
3
t
12
t
13
t
4
CS
= 0
CNVST
,
RD
BUSY
DATA BUS
Figure 15. Slave Parallel Data Timing for Reading (Read During Convert)
MASTER SERIAL INTERFACE
Internal Clock
The AD7660 is configured to generate and provide the serial
data clock SCLK when the EXT/
INT
pin is held low. The AD7660
also generates a SYNC signal to indicate to the host when the
serial data is valid. The serial clock SCLK and the SYNC signal
can be inverted if desired. The output data is valid on both the
rising and falling edge of the data clock. Depending on RDC/
SDIN input, the data can be read after each conversion, or
during the following conversion. Figure 16 and Figure 17 show
the detailed timing diagrams of these two modes.
Usually, because the AD7660 has a longer acquisition phase
than the conversion phase, the data is read immediately after
conversion. That makes the mode master, read after conver-
sion, the most recommended serial mode when it can be used.
In read-after-conversion mode, it should be noted that, unlike
in other modes, the signal BUSY returns low after the 16 data
bits are pulsed out and not at the end of the conversion phase
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7660AST | 16-Bit, 100 kSPS CMOS ADC |
| AD7660ASTRL | 16-Bit, 100 kSPS CMOS ADC |
| AD7664 | Circular Connector; No. of Contacts:4; Series:D38999; Body Material:Metal; Connecting Termination:Crimp; Connector Shell Size:13; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:13-4 |
| AD7664ASTRL | 16-Bit, 570 kSPS CMOS ADC |
| AD7664AST | 16-Bit, 570 kSPS CMOS ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7660ACP | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:16-BIT, 100KSPS CMOS ADC - Bulk |
| AD7660ACPRL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LFCSP EP T/R |
| AD7660ACPZ | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LFCSP EP |
| AD7660ACPZRL | 功能描述:IC ADC 16BIT UNIPOLAR 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7660AST | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:16-BIT, 100KSPS CMOS ADC - Bulk 制造商:Analog Devices 功能描述:Digital-Analog Converter IC Interface Ty |
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