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參數(shù)資料
| 型號： | AD7701TQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 16-Bit A/D Converter |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 312K |
| 代理商： | AD7701TQ |
AD7701
REV. D
–4–
ORDE RING GUIDE
T emperature
Range
Linearity
E rror (% FSR) Options*
Package
Model
AD7701AN
AD7701BN
AD7701AR
AD7701BR
AD7701ARS
AD7701AQ
AD7701BQ
AD7701SQ
AD7701T Q
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
0.003
0.0015
0.003
0.0015
0.003
0.003
0.0015
0.003
0.0015
N-20
N-20
R-20
R-20
RS-28
Q-20
Q-20
Q-20
Q-20
NOT ES
*N = Plastic DIP; Q = Cerdip; R = SOIC; RS = SSOP.
PIN FUNCT ION DE SCRIPT ION
Pin
Mnemonic
Description
1
MODE
Selects the Serial Interface Mode. If MODE is tied to –5 V, the AD7701 will operate in the asynchronous
communications (ac) mode. T he SCLK pin is configured as an input, and data is transmitted in two bytes,
each with one start bit and two stop bits. If MODE is tied to DGND, the synchronous external clocking
(SEC) mode is selected. SCLK is configured as an input, and the output appears without formatting, the
MSB coming first. If MODE is tied to +5 V, the AD7701 operates in the synchronous self-clocking (SSC)
mode. SCLK is configured as an output, with a clock frequency of f
CLK lN
/4 and 25% duty-cycle.
Clock Output to generate an Internal Master Clock by connecting a crystal between CLK OUT and CLK IN.
If an external clock is used, CLK OUT is not connected.
Clock Input for External Clock.
System Calibration Pins. T he state of these pins, when CAL is taken high, determines the type of calibration
performed.
Digital Ground. Ground reference for all digital signals.
Digital Negative Supply, –5 V nominal.
Analog Negative Supply, –5 V nominal.
Analog Ground. Ground reference for all analog signals.
Analog Input.
Voltage Reference Input, +2.5 V nominal. T his determines the value of positive full-scale in the unipolar
mode and of both positive and negative full-scale in the bipolar mode.
Sleep mode pin. When this pin is taken low, the AD7701 goes into a low-power mode with typically 10
μ
W
power consumption.
Bipolar/Unipolar Mode Pin. When this pin is low, the AD7701 is configured for a unipolar input range going
from AGND to V
REF
. When Pin 12 is high, the AD7701 is configured for a bipolar input range,
±
V
REF
.
Calibration Mode Pin. When CAL is taken high for more than 4 cycles, the AD7701 is reset and performs a
calibration cycle when CAL is brought low again. T he CAL pin can also be used as a strobe to synchronize
the operation of several AD7701s.
Analog Positive Supply, +5 V nominal.
Digital Positive Supply, +5 V nominal.
Chip Select Input. When
CS
is brought low, the AD7701 will begin to transmit serial data in a format deter-
mined by the state of the MODE pin.
Data Ready output.
DRDY
is low when valid data is available in the output register. It goes high after transmission
of a word is completed. It also goes high for four clock cycles when a new data word is being loaded into the out-
put register, to indicate that valid data is not available, irrespective of whether data transmission is complete or not.
Serial Clock Input/Output. T he SCLK pin in configured as an input or output, dependent on the type of se-
rial data transmission that has been selected by the MODE pin. When configured as an output in the syn-
chronous self-clocking mode, it has a frequency of f
CLK IN
/4 and a duty cycle of 25%.
Serial Data Output. T he AD7701’s output data is available at this pin as a 16-bit serial word. T he transmis-
sion format is determined by the state of the MODE pin.
2
CLK OUT
3
4, 17
CLK IN
SC1, SC2
5
6
7
8
9
10
DGND
DV
SS
AV
SS
AGND
A
IN
V
REF
11
SLEEP
12
BP/
UP
13
CAL
14
15
16
AV
DD
DV
DD
CS
18
DRDY
19
SCLK
20
SDAT A
DIP, C erdip, SOIC
MODE
SC1
DGND
CLKOUT
CLKIN
AGND
DV
SS
AV
SS
A
IN
V
REF
SDATA
SCLK
SC2
CAL
AV
DD
DV
DD
DRDY
CS
BP/UP
SLEEP
(TOP VIEW
AD7701
1
2
3
4
5
6
7
8
9
10
14
13
12
11
20
19
18
17
16
15
SSOP
MODE
SC1
DGND
CLKOUT
CLKIN
AGND
DV
SS
AV
SS
A
IN
V
REF
SDATA
SCLK
SC2
CAL
AV
DD
DV
DD
DRDY
CS
BP/UP
SLEEP
(TOP VIEW
AD7701
1
2
3
4
5
6
7
8
9
10
14
13
12
11
20
19
18
17
16
15
21
22
23
24
25
26
27
28
NC
NC
NC
NC
NC
NC
NC
NC
NC = NO CONNECT
PIN C ONF IGURAT IONS
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