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參數資料
| 型號： | AD7707 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| 中文描述： | 3 V / 5號第五，1毫瓦3 -10 V輸入范圍通道16位Σ-Δ模數轉換器 |
| 文件頁數： | 37/40頁 |
| 文件大?。?/td> | 316K |
| 代理商： | AD7707 |
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REV. A
AD7707
–37–
Accommodating Various High Level Input Ranges
The high level input channel, AIN3 can accommodate input signals from –11 V to +30 V on its input. This is achieved using
on-chip thin film resistors that map the signal on AIN3 into a usable range for the AD7707. The input structure is arranged
so that the sigma-delta converter sees the same impedance at its AIN(+) and AIN(–) inputs. The signal on the AIN3 input is
referenced to the HICOM input and the VBIAS signal is used to adjust the common-mode voltage at the modulator input.
In normal 5 V operation VBIAS is normally connected to 2.5 V and HICOM is connected to AGND. This arrangement
ensures that the voltages seen at the modulator input are within the common-mode range of the buffer.
The differential voltage, AIN, seen by the AD7707 when using the high level input channel is the difference between AIN3(+)
and AIN3(–) as shown in Figure 30 and must remain within the absolute common-mode range of the modulator.
AIN
3(+)
=
(
AIN
3 + 6
×
VBIAS+ V
(
HICOM
))
/
8
AIN
3(–)
=
0.75
×
VBIAS +
0.25
V
(
HICOM
)
AIN = (AIN3 – V
(
HICOM
))/8
AIN
5k
V
30k
V
15k
V
5k
V
AIN3
VBIAS
HICOM
AIN3(+)
AIN3(–)
30k
V
MUX
Figure 30. AIN3, High Level Input Channel Structure
The VBIAS and HICOM inputs are used to tailor the input range on the high level input channel to suit a variety of input
ranges. The following table applies for operation with AV
DD
= 5 V, and REF(+) – REF(–) = 2.5 V.
Table XIX
AIN3 RANGE
VBIAS
HICOM
GAIN
BUF/UNBUF
AIN RANGE
±
10 V
±
5 V
0 V to 10 V
0 V to 20 V
2.5 V
2.5 V
2.5 V
AGND
2.5 V
2.5 V
AGND
AGND
AGND
AGND
AGND
2.5 V
2
4
2
1
1
2
BUF/UNBUF
BUF/UNBUF
BUF/UNBUF
UNBUF
UNBUF
BUF/UNBUF
1.875 V
±
1.25 V
1.875 V
±
0.625 V
1.875 V to 3.125 V
0 V to 2.5 V
1.875 V to 4.375 V
2.5 V
±
0.9375 V
–5 V to +10 V
The following table applies for operation with AV
DD
= 3 V, and REF(+) – REF(–) = 1.25 V.
Table XX
AIN3 RANGE
VBIAS
HICOM
GAIN
BUF/UNBUF
AIN RANGE
±
5 V
0 V to 10 V
–5 V to +10 V
–7.5 V to +10 V
±
10 V
1.25 V
1.25 V
1.25 V
1.25 V
1.666 V
AGND
AGND
2.5 V
0
AGND
2
1
1
1
1
UNBUF
UNBUF
UNBUF
UNBUF
UNBUF
0.9375 V
±
0.625 V
0.9375 V to 2.1875 V
1.5625 V
±
0.9375 V
0 V to 2.1875 V
1.25 V
±
1.25 V
Typical Input Currents
When using the high level input channel, power dissipation is determined by the currents flowing in the AIN3, VBIAS and
HICOM inputs. The voltage level applied to these inputs determines whether the external source driving these inputs needs
to sink of source current. The following table shows the currents associated with the
±
10 V input range. These inputs should
be driven from a low impedance source in all applications to prevent significant gain errors being introduced.
Table XXI
AIN3
VBIAS
HICOM
I (AIN3)
I (VBIAS)
I (HICOM)
–10 V
0 V
+10 V
2.5 V
2.5 V
2.5 V
AGND
AGND
AGND
–354
μ
A
–62
μ
A
229
μ
A
500
μ
A
250
μ
A
0
–146
μ
A
–188
μ
A
–229
μ
A
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