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參數資料
| 型號： | AD7707BR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 3 V/5 V, +-10 V Input Range, 1 mW 3-Channel 16-Bit, Sigma-Delta ADC |
| 中文描述： | 3-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數： | 21/40頁 |
| 文件大小： | 316K |
| 代理商： | AD7707BR |
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REV. A
AD7707
–21–
Input Sample Rate
The modulator sample frequency for the AD7707 remains at
f
CLKIN
/128 (19.2kHz @ f
CLKIN
= 2.4576MHz) regardless of the
selected gain. However, gains greater than 1 are achieved by a
combination of multiple input samples per modulator cycle and
a scaling of the ratio of reference capacitor to input capacitor. As
a result of the multiple sampling, the input sample rate of the
device varies with the selected gain (see Table XVII). In buff-
ered mode, the input impedance is constant. In unbuffered
mode, where the analog input looks directly into the sampling
capacitor, the effective input impedance is 1/C
SAMP
×
f
S
where
C
SAMP
is the input sampling capacitance and f
S
is the input
sample rate.
Table XVII. Input Sampling Frequency vs. Gain
Gain
Input Sampling Frequency (f
S
)
1
2
4
8–128
f
CLKIN
/64 (38.4kHz @ f
CLKIN
= 2.4576MHz)
2
f
CLKIN
/64 (76.8kHz @ f
CLKIN
=2.4576MHz)
4
×
f
CLKIN
/64 (76.8kHz @ f
CLKIN
=2.4576MHz)
8
×
f
CLKIN
/64 (307.2kHz @ f
CLKIN
= 2.4576MHz)
Bipolar/Unipolar Inputs
The analog inputs on the low level input channels on the AD7707
can accept either unipolar or bipolar input voltage ranges with
respect to LOCOM.
The high level input channel handles true bipolar signals of
±
10 V max for guaranteed operation.
Bipolar or unipolar options are chosen by programming the
B
/U
bit of the Setup Register. This programs the channel for either
unipolar or bipolar operation. Programming the channel for
either unipolar or bipolar operation does not change any of the
channel conditions, it simply changes the data output coding
and the points on the transfer function where calibrations occur.
In unipolar operation the output coding is straight binary. In
bipolar mode the output coding is offset binary.
REFERENCE INPUT
The AD7707 reference inputs, REFIN(+) and REFIN(–),
provide a differential reference input capability. The common-
mode range for these differential inputs is from GND to AV
DD
.
The nominal reference voltage, V
REF
REFIN(+)– REFIN(–),
for specified operation, is +2.5V for the AD7707 operated with
an AV
DD
of 5 V and +1.225 V for the AD7707 operated with an
AV
DD
of +3 V. The part is functional with V
REF
voltages down
to 1 V, but with degraded performance since the LSB size is
smaller. REFIN(+) must always be greater than REFIN(–) for
correct operation of the AD7707.
Both reference inputs provide a high impedance, dynamic load
similar to the analog inputs in unbuffered mode. The maximum
dc input leakage current is
±
1 nA over temperature, and source
resistance may result in gain errors on the part. In this case, the
sampling switch resistance is 5 k
typ and the reference capaci-
tor (C
REF
) varies with gain. The sample rate on the reference
inputs is f
CLKIN
/64 and does not vary with gain. For gains of 1
and 2, C
REF
is 8pF; for a gain of 16, it is 5.5pF; for a gain of
32, it is 4.25 pF; for a gain of 64, it is 3.625 pF and for a gain of
128, it is 3.3125pF.
The output noise performance outlined in Tables I through IV
is for an analog input of 0 V, which effectively removes the effect
of noise from the reference. To obtain the same noise perfor-
mance as shown in the noise tables over the full input range
requires a low noise reference source for the AD7707. If the
reference noise in the bandwidth of interest is excessive, it will
degrade the performance of the AD7707. In bridge transducer
applications where the reference voltage for the ADC is derived
from the excitation voltage the effect of the noise in the excita-
tion voltage will be removed as the application is ratiometric.
Recommended reference voltage sources for the AD7707 with
an AV
DD
of 5 V include the AD780, REF43 and REF192, while
the recommended reference sources for the AD7707 operated
with an AV
DD
of 3 V include the AD589 and AD1580. It is
generally recommended to decouple the output of these refer-
ences in order to further reduce the noise level.
DIGITAL FILTERING
The AD7707 contains an on-chip low-pass digital filter which
processes the output of the part’s sigma-delta modulator. There-
fore, the part not only provides the analog-to-digital conversion
function but also provides a level of filtering. There are a num-
ber of system differences when the filtering function is provided
in the digital domain rather than the analog domain and the
user should be aware of these.
First, since digital filtering occurs after the A-to-D conversion
process, it can remove noise injected during the conversion
process. Analog filtering cannot do this. Also, the digital filter
can be made programmable far more readily than an analog
filter. Depending on the digital filter design, this gives the user
the capability of programming cutoff frequency and output
update rate.
On the other hand, analog filtering can remove noise superim-
posed on the analog signal before it reaches the ADC. Digital
filtering cannot do this and noise peaks riding on signals near
full scale have the potential to saturate the analog modulator
and digital filter, even though the average value of the signal is
within limits. To alleviate this problem, the AD7707 has over-
range headroom built into the sigma-delta modulator and digital
filter, which allows overrange excursions of 5% above the analog
input range. If noise signals are larger than this, consideration
should be given to analog input filtering, or to reducing the
input channel voltage so that its full scale is half that of the
analog input channel full scale. This will provide an overrange
capability greater than 100% at the expense of reducing the
dynamic range by 1 bit (50%).
In addition, the digital filter does not provide any rejection at
integer multiples of the digital filter’s sample frequency. How-
ever, the input sampling on the part provides attenuation at
multiples of the digital filter’s sampling frequency so that the
unattenuated bands actually occur around multiples of the
sampling frequency f
S
(as defined in Table XV). Thus the
unattenuated bands occur at n
×
f
S
(where n = 1, 2, 3 . . .). At
these frequencies, there are frequency bands,
±
f
3
dB
wide f
3
dB
is
the cutoff frequency of the digital filter) at either side where
noise passes unattenuated to the output.
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|---|---|
| AD7707BRU | 3 V/5 V, +-10 V Input Range, 1 mW 3-Channel 16-Bit, Sigma-Delta ADC |
| AD7707 | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7707BR-REEL | 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 500sps 16-bit Serial 20-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 0.5KSPS 16BIT SERL 20SOIC W - Tape and Reel |
| AD7707BR-REEL7 | 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 500sps 16-bit Serial 20-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 0.5KSPS 16BIT SERL 20SOIC W - Tape and Reel |
| AD7707BRU | 功能描述:IC ADC 16BIT 3CH 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7707BRU-REEL | 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 500sps 16-bit Serial 20-Pin TSSOP T/R 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 0.5KSPS 16BIT SERL 20TSSOP - Tape and Reel |
| AD7707BRU-REEL7 | 功能描述:IC ADC 16BIT 3CH 20-TSSOP T/R RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率（每秒）:45k 數據接口:串行 轉換器數目:2 功率耗散（最大）:315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端，單極 |
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