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參數資料
| 型號： | AD7732 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | 2-Channel, +-10 V Input Range, High Throughput, 24-Bit SIGMA- ADC |
| 中文描述： | 2通道，-10 V輸入范圍，高通量，24位Σ-模數轉換器 |
| 文件頁數： | 5/32頁 |
| 文件大小： | 1576K |
| 代理商： | AD7732 |
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AD7732
Parameter
DV
DD
Current (Normal Mode)
14
Power Dissipation (Normal Mode)
14
AV
DD
+DV
DD
Current (Standby Mode)
15
Power Dissipation (Standby Mode)
15
Rev. 0 | Page 5 of 32
Min
Typ
1.0
85
140
750
Max
1.5
100
Unit
mA
mW
μA
μW
Test Conditions/Comments
DV
DD
= 3 V
1
Specifications are not production tested but guaranteed by design and/or characterization data at initial product release.
2
See Typical Performance Characteristics.
3
V
CM
= Common-Mode Voltage = 0 V.
4
Specifications before calibration. Channel system calibration reduces these errors to the order of the noise.
5
Applies after the zero-scale and full-scale calibration. The negative full-scale error represents the remaining error after removing the offset and gain error.
6
ADC zero-scale self-calibration reduces this error to ±10 mV. Channel zero-scale system calibration reduces this error to the order of the noise.
7
For specified performance. The output data span corresponds to the specified nominal input voltage range. The ADC is functional outside the nominal input voltage
range, but the performance might degrade. Outside the nominal input voltage range, the OVR bit in the channel status register is set and the channel data register
value depends on the CLAMP bit in the mode register. See the register and circuit descriptions for more details.
8
The AIN absolute voltage of ±16.5 V applies for a nominal VBIAS voltage of +2.5 V. By configuring the BIAS and RA to RD pins differently, the part will work with higher
AIN absolute voltages as long as the internal voltage seen by the multiplexer and the input buffer is within 200 mV to AV
DD
– 300 mV. Absolute voltage for the AIN,
BIAS, and RA to RD pins must never exceed the values specified in the Absolute Maximum Ratings.
9
Pin impedance is from the pin to the internal node. In normal circuit configuration, the analog input total impedance is typically 108.5 k + 15.5 k = 124 k.
10
For specified performance. Part is functional with lower V
REF
.
11
Dynamic current charging the sigma-delta modulator input switching capacitor.
12
Outside the specified calibration range, calibration is possible but the performance may degrade.
13
These logic output levels apply to the MCLK OUT output when it is loaded with a single CMOS load.
14
With external MCLK, MCLKOUT is disabled (the CLKDIS bit is set in the m
ode register).
15
External MCLKIN = 0 V or DV
DD
, Digital Inputs = 0 V or DV
DD
, and P0 and P1 = 0 V or AV
DD.
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| AD7732BRUZ | 功能描述:IC ADC 24BIT 2-CH 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7732BRUZ | 制造商:Analog Devices 功能描述:IC 24BIT ADC SMD 7732 TSSOP28 |
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