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參數(shù)資料
型號: AD7825BR
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 3 V/5 V, 2 MSPS, 8-Bit, 1-, 4-, 8-Channel Sampling ADCs
中文描述: 4-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
封裝: MS-013AD, SOIC-24
文件頁數(shù): 3/18頁
文件大?。?/td> 215K
代理商: AD7825BR
Parameter
Version B
Unit
Test Condition/Comment
CONVERSION RATE
Track/Hold Acquisition Time
Conversion Time
200
420
ns max
ns max
See Functional Description Section
POWER SUPPLY REJECTION
V
DD
±
10%
±
1
LSB max
POWER REQUIREMENTS
V
DD
4.5
5.5
2.7
3.3
V min
V max
V min
V max
5 V
±
10%. For Specified Performance
V
DD
3 V
±
10%. For Specified Performance
I
DD
Normal Operation
Power-Down
12
5
0.2
mA max
μ
A max
μ
A typ
8 mA Typically
Logic Inputs = 0 V or V
DD
Power Dissipation
Normal Operation
Power-Down
200 kSPS
1 MSPS
V
DD
= 3 V
Typically 24 mW
36
mW max
9.58
47.88
mW max
mW max
NOTES
1
See Terminology section of this data sheet.
2
Refer to the Analog Input section for an explanation of the Analog Input(s).
Specifications subject to change without notice.
ORDERING GUIDE
Linearity
Error
±
0.75 LSB
±
0.75 LSB
±
0.75 LSB
Package
Description
Package
Option
Model
AD7822BN
AD7822BR
AD7822BRU
Plastic DIP
Small Outline IC
Thin Shrink Small
Outline (TSSOP)
Plastic DIP
Small Outline IC
Thin Shrink Small
Outline (TSSOP)
Plastic DIP
Small Outline IC
Thin Shrink Small
Outline (TSSOP)
N-20
R-20
RU-20
AD7825BN
AD7825BR
AD7825BRU
±
0.75 LSB
±
0.75 LSB
±
0.75 LSB
N-24
R-24
RU-24
AD7829BN
AD7829BR
AD7829BRU
±
0.75 LSB
±
0.75 LSB
±
0.75 LSB
N-28
R-28
RU-28
+2.1V
I
OL
200
m
A
200
m
A
I
OH
TO
OUTPUT
PIN
C
L
50pF
Figure 1. Load Circuit for Access Time and Bus
Relinquish Time
AD7822/AD7825/AD7829
–3–
REV. A
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