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參數(shù)資料
| 型號： | AD7862AN-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Simultaneous Sampling Dual 250 kSPS 12-Bit ADC |
| 中文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大小： | 414K |
| 代理商： | AD7862AN-3 |
AD7862
–7–
REV. 0
CONVERTER DETAILS
The AD7862 is a high speed, low power, dual 12-bit A/D
converter that operates from a single +5 V supply. The part
contains two 4
μ
s successive approximation ADCs, two track/
hold amplifiers, an internal +2.5 V reference and a high speed
parallel interface. There are four analog inputs that are grouped
into two channels (A & B) selected by the A0 input. Each
channel has two inputs (V
A1
& V
A2
or V
B1
& V
B2
) that can be
sampled and converted simultaneously thus preserving the
relative phase information of the signals on both analog inputs.
The part accepts an analog input range of
±
10 V (AD7862-10),
±
2.5 V (AD7862-3) and 0 V–2.5 V (AD7862-2). Overvoltage
protection on the analog inputs for the part allows the input
voltage to go to
±
17 V,
±
7 V or +7 V, respectively, without
causing damage. The AD7862 has two operating modes, the
high sampling mode and the auto sleep mode where the part
automatically goes into sleep after the end of conversion. These
modes are discussed in more detail in the
Timing and Control
Section.
Conversion is initiated on the AD7862 by pulsing the
CONVST
input. On the falling edge of
CONVST
, both on-chip track/
holds are placed into hold simultaneously, and the conversion
sequence is started on both channels. The conversion clock for
the part is generated internally using a laser-trimmed clock
oscillator circuit. The BUSY signal indicates the end of
conversion, and at this time the conversion results for both
channels are available to be read. The first read after a conver-
sion accesses the result from V
A1
or V
B1
while the second read
accesses the result from V
A2
or V
B2
, depending on whether the
multiplexer select A0 is low or high, respectively. Data is read
from the part via a 12-bit parallel data bus with standard
CS
and
RD
signals.
Conversion time for the AD7862 is 3.6
μ
s in the high sampling
mode (6
μ
s for the auto sleep mode), and the track/hold
acquisition time is 0.3
μ
s. To obtain optimum performance
from the part, the read operation should not occur during the
conversion or during 300 ns prior to the next conversion. This
allows the part to operate at throughput rates up to 250 kHz
and achieve data sheet specifications.
Track/Hold Section
The track/hold amplifiers on the AD7862 allow the ADCs to
accurately convert an input sine wave of full-scale amplitude to
12-bit accuracy. The input bandwidth of the track/hold is
greater than the Nyquist rate of the ADC even when the ADC
is operated at its maximum throughput rate of 250 kHz (i.e.,
the track/hold can handle input frequencies in excess of 125 kHz).
The track/hold amplifiers acquire input signals to 12-bit
accuracy in less than 400 ns. The operation of the track/holds is
essentially transparent to the user. The two track/hold amplifi-
ers sample their respective input channels simultaneously on the
falling edge of
CONVST
. The aperture time for the track/holds
(i.e., the delay time between the external
CONVST
signal and
the track/hold actually going into hold) is typically 15 ns and,
more importantly, is well matched across the two track/holds on
one device and also well matched from device to device. This
allows the relative phase information between different input
channels to be accurately preserved. It also allows multiple
AD7862s to sample more than two channels simultaneously. At
the end of conversion, the part returns to its tracking mode.
The acquisition time of the track/hold amplifiers begins at
this point.
Reference Section
The AD7862 contains a single reference pin, labelled VREF,
which either provides access to the part’s own +2.5 V reference
or to which an external +2.5 V reference can be connected to
provide the reference source for the part. The part is specified
with a +2.5 V reference voltage. Errors in the reference source
will result in gain errors in the AD7862’s transfer function and
will add to the specified full-scale errors on the part. On the
AD7862-10 and the AD7862-3, it will also result in an offset
error injected in the attenuator stage.
The AD7862 contains an on-chip +2.5 V reference. To use this
reference as the reference source for the AD7862, simply
connect a 0.1
μ
F disc ceramic capacitor from the VREF pin to
AGND. The voltage that appears at this pin is internally
buffered before being applied to the ADC. If this reference is
required for use external to the AD7862, it should be buffered
as the part has a FET switch in series with the reference output,
resulting in a source impedance for this output of 3 k
nominal.
The tolerance on the internal reference is
±
10 mV at 25
°
C with
a typical temperature coefficient of 25 ppm/
°
C and a maximum
error over temperature of
±
25 mV.
If the application requires a reference with a tighter tolerance or
the AD7862 needs to be used with a system reference, the user
has the option of connecting an external reference to this VREF
pin. The external reference will effectively overdrive the internal
reference and provide the reference source for the ADC. The
reference input is buffered before being applied to the ADC
with the maximum input current of
±
100
μ
A. Suitable reference
sources for the AD7862 include the AD680, AD780 and
REF43 precision +2.5 V references.
CIRCUIT DESCRIPTION
Analog Input Section
The AD7862 is offered as three part types; the AD7862-10,
which handles a
±
10 V input voltage range; the AD7862-3,
which handles input voltage range
±
2.5 V; and the AD7862-2,
which handles a 0 V to +2.5 V input voltage range.
AGND
AD7862-10/AD7862-3
V
AX
V
REF
TRACK/
HOLD
TO ADC
REFERENCE
CIRCUITRY
TO INTERNAL
COMPARATOR
R3
R2
R1
MUX
2k
+2.5V
REFERENCE
Figure 3. AD7862-10/-3 Analog Input Structure
Figure 3 shows the analog input section for the AD7862-10 and
AD7862-3. The analog input range of the AD7862-10 is
±
10 V
into an input resistance of typically 33 k
. The analog input
range of the AD7862-3 is
±
2.5 V into an input resistance of
typically 12 k
. This input is benign with no dynamic charging
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7862AR-10 | Simultaneous Sampling Dual 250 kSPS 12-Bit ADC |
| AD7862BR-10 | Simultaneous Sampling Dual 250 kSPS 12-Bit ADC |
| AD7863AR-10 | RECTIFIER SCHOTTKY DUAL 30A 30V 275A-ifsm 0.55V-vf 1mA-ir TO-3P 30/TUBE |
| AD7863BR-10 | RECTIFIER FAST-RECOVERY SINGLE 1A 400V 30A-ifsm 1.3V-vf 50ns 5uA-ir DO-41 1K/BULK |
| AD7863BR-3 | RECTIFIER FAST-RECOVERY SINGLE 1A 600V 30A-ifsm 1.7V-vf 75ns 5uA-ir DO-41 1K/BULK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7862ANZ-10 | 功能描述:IC ADC 12BIT DUAL 250KSPS 28DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7862ANZ-3 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD7862AR-10 | 功能描述:IC ADC 12BIT DUAL 250KSPS 28SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7862AR-10REEL | 制造商:Analog Devices 功能描述:ADC Dual SAR 250ksps 12-bit Parallel 28-Pin SOIC W T/R |
| AD7862AR-2 | 制造商:Analog Devices 功能描述:ADC Dual SAR 250ksps 12-bit Parallel 28-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:DUAL 12-BIT PARALLEL ADC I.C. - Bulk |
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