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參數資料
型號: AD7864BS-1
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: SWITCH SLIDE DP3T RT ANG L=6MM
中文描述: 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP44
封裝: PLASTIC, MO-112-AA, MQFP-44
文件頁數: 13/19頁
文件大?。?/td> 214K
代理商: AD7864BS-1
AD7864
–13–
REV. A
CONVST
BUSY
EOC
RD
1 2
3 4 5 6 7 8 9 10 1112 13 14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2
13 14
CLK
FRSTDATA
FIRST CONVERSION
COMPLETE
LAST CONVERSION
COMPLETE
Figure 9. Using an External Clock
Standby Mode Operation
The AD7864 has a Standby Mode whereby the device can be
placed in a low current consumption mode (5
μ
A typ). The
AD7864 is placed in standby by bringing the logic input
STBY
low. The AD7864 can be powered up again for normal opera-
tion by bringing
STBY
logic high. The output data buffers are
still operational while the AD7864 is in standby. This means
the user can still continue to access the conversion results while
the AD7864 is in standby. This feature can be used to reduce
the average power consumption in a system using low through-
put rates. To reduce the average power consumption the AD7864
can be placed in standby at the end of each conversion sequence,
i.e., when BUSY goes low and taken out of standby again prior
the start of the next conversion sequence. The time it takes the
AD7864 to come out of standby is called the “wake up” time.
This wake-up time will limit the maximum throughput rate at
which the AD7864 can be operated when powering down be-
tween conversion sequences. The AD7864 will wake-up in
approximately 2
μ
s when using an external reference. The
“wake up” time is also 2
μ
s when the standby time is less than 1
millisecond while using the internal reference. Figure 11 shows
the wake-up time of the AD7864 for standby times greater than
1 millisecond. Note when the AD7864 is left in standby for
periods of time greater than 1 millisecond the part will require
more than 2
μ
s to wake up. For example after initial power up,
using the internal reference the AD7864 takes 6 ms to power
up. The maximum throughput rate that can be achieved when
powering down between conversions is 1/(t
BUSY
+ 2
μ
s) = 100
kSPS, approximately. When operating the AD7864 in a
standby mode between conversions the power savings can be
significant. For example with a throughput rate of 10 kSPS the
AD7864 will be powered down (I
DD
= 5
μ
A) for 90
μ
s out of
every 100
μ
s. See Figure 10. Therefore the average power con-
sumption drops to (125/10) mW or 12.5 mW approximately.
STANDBY TIME – sec
1
0.9
0
0.0001
10
0.001
0.01
0.1
1
0.6
0.3
0.2
0.1
0.8
0.7
0.4
0.5
P
+105
8
C
+25
8
C
–40
8
C
Figure 11. Power-Up Time vs. Standby Time Using the
On-Chip Reference (Decoupled with 0.1
μ
F Capacitor)
Accessing the Output Data Registers
There are four Output Data Registers, one for each of the four
possible conversion results from a conversion sequence. The
result of the first conversion in a conversion sequence is placed
in Register 1 and the second result is placed in Register Number
2 and so on. For example if the conversion sequence VIN1,
VIN3 and VIN4 is selected (see Conversion Sequence Selec-
tion) then the results of the conversion on VIN1, VIN3 and
VIN4 are placed in Registers 1 to 3 respectively. The Output
Data register pointer is reset to point to Register 1 at the end of
the first conversion in the sequence, just prior to
EOC
going
CONVST
BUSY
STBY
100
m
s
m
s
t
BUSY
I
DD
= 20
m
A
t
BUSY
m
t
WAKEUP
Figure 10. Power-Down Between Conversion Sequences
相關PDF資料
PDF描述
AD7864AS-2 4-Channel, Simultaneous Sampling, High Speed, 12-Bit ADC
AD7864AS-3 4-Channel, Simultaneous Sampling, High Speed, 12-Bit ADC
AD7864AS IC-SM-12-BIT ADC
AD7865YS-1 Four-Channel, Simultaneous Sampling, Fast, 14-Bit ADC
AD7865YS-2 Four-Channel, Simultaneous Sampling, Fast, 14-Bit ADC
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