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參數資料
| 型號： | AD7870CQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP24 |
| 封裝： | 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-24 |
| 文件頁數： | 3/20頁 |
| 文件大小： | 331K |
| 代理商： | AD7870CQ |
AD7875/AD7876
K, B
1
L, C
1
Parameter
T
1
Units
T est Conditions/Comments
DC ACCURACY
Resolution
Minimum Resolution for Which
No Missing Codes Are Guaranteed
Integral Nonlinearity @ +25
°
C
T
MIN
to T
MAX
(AD7875 Only)
T
MIN
to T
MAX
(AD7876 Only)
Differential Nonlinearity
Unipolar Offset Error (AD7875 Only)
Bipolar Zero Error (AD7876 Only)
Full-Scale Error at +25
°
C
2
Full-Scale T C
2
T rack/Hold Acquisition T ime
12
12
12
Bits
12
±
1
±
1
±
1
±
1
±
5
±
6
±
8
±
60
2
12
±
1/2
±
1
±
1/2
±
1
±
5
±
2
±
8
±
35
2
12
±
1
±
1
±
1
±
1.5/–1.0
±
5
±
6
±
8
±
60
2
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
ppm/
°
C max
μ
s max
T ypical Full-Scale Error Is
±
1 LSB
T ypical T C is
±
20 ppm/
°
C
DYNAMIC PERFORMANCE
3
(AD7875 ONLY)
Signal-to-Noise Ratio
4
(SNR)
@ +25
°
C
T
MIN
to T
MAX
T otal Harmonic Distortion (T HD)
70
70
–80
72
71
–80
69
69
–78
dB min
dB min
dB max
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically 71.5 dB for 0 < V
IN
< 50 kHz
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically –86 dB for 0 < V
IN
< 50 kHz
V
IN
= 10 kHz, f
SAMPLE
= 100 kHz
T ypically –86 dB for 0 < V
IN
< 50 kHz
Peak Harmonic or Spurious Noise
–80
–80
–78
dB max
Intermodulation Distortion (IMD)
Second Order T erms
T hird Order T erms
–80
–80
–80
–80
–78
–78
dB max
dB max
fa = 9 kHz, fb = 9.5 kHz, f
SAMPLE
= 50 kHz
fa = 9 kHz, fb = 9.5 kHz, f
SAMPLE
= 50 kHz
ANALOG INPUT
AD7875 Input Voltage Range
AD7875 Input Current
AD7876 Input Voltage Range
AD7876 Input Current
0 to +5 0 to +5 0 to +5
500
500
±
10
±
10
±
600
±
600
Volts
μ
A max
Volts
μ
A max
500
±
10
±
600
REFERENCE OUT PUT
REF OUT @ +25
°
C
2.99
3.01
±
60
–1
2.99
3.01
±
35
–1
2.99
3.01
±
60
–1
V min
V max
ppm/
°
C max
mV max
REF OUT T empco
Reference Load Sensitivity (
REF OUT /
I)
T ypical T empco Is
±
20 ppm/
°
C
Reference Load Current Change (0
μ
A–500
μ
A)
Reference Load Should Not Be Changed
During Conversion.
LOGIC INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Current (12/
8
/CLK Input Only)
Input Capacitance, C
IN5
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
V min
V max
μ
A max
μ
A max
pF max
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
V
IN
= V
SS
to V
DD
LOGIC OUT PUT S
Output High Voltage, V
OH
Output Low Voltage, V
OL
DB11–DB0
Floating-State Leakage Current
Floating-State Output Capacitance
5
4.0
0.4
4.0
0.4
4.0
0.4
V min
V max
I
SOURCE
= 40
μ
A
I
SINK
= 1.6 mA
10
15
10
15
10
15
μ
A max
pF max
CONVERSION T IME
External Clock (f
CLK
= 2.5 MHz)
Internal Clock
8
7/9
8
7/9
8
7/9
μ
s max
μ
s min/
μ
s max
POWER REQUIREMENT S
As per AD7870
NOT ES
1
T emperature ranges are as follows: AD7875: K , L Versions, 0
°
C to +70
°
C; B, C Versions, –40
°
C to +85
°
C; T Version, –55
°
C to +125
°
C. AD7876: B, C Versions,
–40
°
C to +85
°
C; T Version, –55
°
C to +125
°
C.
2
Includes internal reference error and is calculated after unipolar offset error (AD7875) or bipolar zero error (AD7876) has been adjusted out.
Full-scale error refers to both positive and negative full-scale error for the AD7876.
3
Dynamic performance parameters are not tested on the AD7876 but these are typically the same as for the AD7875.
4
SNR calculation includes distortion and noise components.
5
Sample tested @ +25
°
C to ensure compliance.
Specifications subject to change without notice.
REV. B
AD7870/AD7875/AD7876
–3–
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