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參數(shù)資料
型號: AD7894BR-3
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: SWITCH SLIDE SPDT .3A SMD
中文描述: 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝: SOIC-8
文件頁數(shù): 11/12頁
文件大小: 131K
代理商: AD7894BR-3
AD7894
–11–
REV. 0
Dynamic Performance (Mode 1 Only)
With a conversion time of 5
μ
s, the AD7894 is ideal for wide
bandwidth signal processing applications. These applications
require information on the ADC’s effect on the spectral con-
tent of the input signal. Signal to (Noise + Distortion), Total
Harmonic Distortion, Peak Harmonic or Spurious Noise and
Intermodulation Distortion are all specified. Figure 11 shows a
typical FFT plot of a 10 kHz,
±
10V input after being digitized
by the AD7894-10 operating at a 160 kHz sampling rate. The
signal to (noise + distortion) ratio is 80.24 dB and the total
harmonic distortion is –96.35 dB.
The formula for signal to (noise + distortion) ratio (see Ter-
minology section) is related to the resolution or number of bits
in the converter. Rewriting the formula, below, gives a mea-
sure of performance expressed in effective number of bits (N):
N
=
(
SNR
–1.76)
6.02
where
SNR
is Signal to (Noise + Distortion) Ratio.
FREQUENCY – kHz
0
–1400
80
10
d
20
30
40
50
60
70
–20
–60
–80
–100
–120
–40
f
S
= 160kHz
F
= 10kHz
SNR = 80.24dB
THD = –96.35dB
Figure 11. AD7894 FFT Plot
The effective number of bits for a device can be calculated from
its measured signal to (noise + distortion) ratio. Figure 12
shows a typical plot of effective number of bits versus frequency
for the AD7894 from dc to f
SAMPLING
/2. The sampling fre-
quency is 160 kHz. The plot shows that the AD7894 converts
an input sine wave of 10kHz to an effective numbers of bits of
13.00, which equates to a signal to (noise + distortion) level of
80.02 dB.
FREQUENCY – kHz
14
13
9
10
1000
100
E
12
11
10
Figure 12. Effective Number of Bits vs. Frequency
Power Considerations
In the automatic power-down mode the part may be operated at
a sample rate that is considerably less than 160 kHz. In this
case, the power consumption will be reduced and will depend
on the sample rate. Figure 13 shows a graph of the power con-
sumption versus sampling rates from 1 Hz to 100 kHz in the
automatic power-down mode. The conditions are 5 V supply
+25
°
C. The SCLK pin was held low and no data was read from
the part.
SAMPLING FREQUENCY – Hz
100
0.11
100000
10
P
100
1000
10000
10
1
Figure 13. Power vs. Sampling Rate in Automatic Power-
Down Mode
82
81
78
–40
80
–20
0
20
40
60
80
79
f
S
= 160kHz
F
IN
= 10kHz
TEMPERATURE –
8
C
S
Figure 14. SNR + D vs. Temperature
FREQUENCY – kHz
100
80
10
1000
100
T
90
70
60
50
40
30
20
10
0
Figure 15. THD vs. Frequency
相關(guān)PDF資料
PDF描述
AD7895AN-3 5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Package
AD7895AR-10 5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Package
AD7895AR-2 5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Package
AD7895AR-3 5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Package
AD7895 14-Bit 50 kSPS ADC Ser. Out, 1.8V Operation 8-MSOP
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