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參數(shù)資料
| 型號： | AD7924BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP |
| 中文描述： | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大小： | 411K |
| 代理商： | AD7924BRU |
–14–
AD7904/AD7914/AD7924
REV. 0
Table II. Channel Selection
ADD1
ADD0
Analog Input Channel
0
0
1
1
0
1
0
1
V
IN
0
V
IN
1
V
IN
2
V
IN
3
Table III. Power Mode Selection
PM1 PM0 Mode
1
1
Normal Operation
. In this mode, the AD7904/
AD7914/AD7924 remain in full power mode
regardless of the status of any of the logicinputs.
This mode allows the fastest possible
throughput
rate from the AD7904/AD7914/AD7924.
Full Shutdown
. In this mode, the
AD7904/
AD7914/AD7924
is in full shutdown mode
with all
circuitry on the AD7904/AD7914/AD7924
powering down. The AD7904/AD7914/AD7924
retains the information in the Control Register
while in full shutdown. The part remains in full
shutdown until these bits are changed.
Auto Shutdown
. In this mode, the AD7904/
AD7914/AD7924/ automatically enters full
shutdown mode at the end of each conversion
when the control register is updated. Wake-up
time from full shutdown is 1
μ
s and the user
should ensure that 1
μ
s has elapsed before
attempting to perform a valid conversion on the
part in this mode.
Invalid Selection
. This configuration is not allowed.
1
0
0
1
0
0
SEQUENCER OPERATION
The configuration of the SEQ1 and SEQ0 bits in the control
register allows the user to select a particular mode of operation
of the sequencer function. Table IV outlines the three modes of
operation of the Sequencer.
Figure 2 reflects the traditional operation of a multichannel ADC,
where each serial transfer selects the next channel for conversion.
In this mode of operation the Sequencer function is not used.
Figure 3 shows how to program the AD7904/AD7914/AD7924
to continuously convert on a sequence of consecutive channels
from Channel 0 to a selected final channel. To exit this mode of
operation and revert back to the traditional mode of operation of a
multichannel ADC (as outlined in Figure 2), ensure that the
WRITE bit = 1 and SEQ1 = SEQ0 = 0 on the next serial transfer.
Table IV. Sequence Selection
SEQ1 SEQ0
Sequence Type
0
X
This configuration means that the sequence
function is not used. The analog input channel
selected for each individual conversion is
determined by the contents of the channel
address bits ADD1, ADD0 in each prior write
operation. This mode of operation reflects the
traditional operation of a multichannel ADC,
without the Sequencer function being used, where
each write to the AD7904/AD7914/AD7924
selects the next channel for conversion
(see Figure 2).
If the SEQ1 and SEQ0 bits are set in this way
then the sequence function will not be interrupted
upon completion of the WRITE operation. This
allows other bits in the Control Register to be
altered between conversions while in a sequence
without terminating the cycle.
This configuration is used in conjunction with
the channel address bits ADD1, ADD0 to
program continuous conversions on a consecutive
sequence of channels from Channel 0 to a selected
final channel as determined by the channel
address bits in the Control Register (see Figure 3).
1
0
1
1
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