
REV. D
AD8021
–17–
Table II. Summary of ADC Driver Performance,
f
C
= 65 kHz, V
OUT
= 10 V p-p
Parameter
Measurement
Unit
Second Harmonic Distortion
Third Harmonic Distortion
THD
SFDR
–101.3
–109.5
–100.0
100.3
dB
dB
dB
dB
50
5V
AD8021
+
–
–12V
+12V
AD7665
570kSPS
1
50
3
2
R
F
750
OPTIONAL C
F
IN
LO
IN
HI
6
50
ADC
C
C
5
R
G
82.5
Figure 9. Noninverting ADC Driver, Gain = 10, f
C
= 100 kHz
Table III. Summary of ADC Driver Performance,
f
C
= 100 kHz, V
OUT
= 20 V p-p
Parameter
Measurement
Unit
Second Harmonic Distortion
Third Harmonic Distortion
THD
SFDR
–92.6
–86.4
–84.4
5.4
dB
dB
dB
dB
Figure 9 shows another ADC driver connection. The circuit was
tested with a noninverting gain of 10.1 and an output voltage of
approximately 20 V p-p for optimum resolution and noise per-
formance. No filtering was used. An FFT was performed using
Analog Devices’ evaluation software for the AD7665 16-bit
converter. The results are listed in Table III.
DIFFERENTIAL DRIVER
The AD8021 is uniquely suited as a low noise differential driver
for many ADCs, balanced lines, and other applications requiring
differential drive. If pairs of internally compensated op amps are
configured as inverter and follower, the noise gain of the inverter
will be higher than that of the follower section, resulting in an
imbalance in the frequency response (see Figure 11).
A better solution takes advantage of the external compensation
feature of the AD8021. By reducing the C
COMP
value of the inverter,
its bandwidth may be increased to match that of the follower,
avoiding compromises in gain bandwidth and phase delay. The
inverting and noninverting bandwidths can be closely matched
using the compensation feature, thus minimizing distortion.
DISABLE
V
OUT
8
7
6
1
2
3
LOGIC REFERENCE
–IN
+IN
–V
S
4
+V
S
5
BYPASS
CAPACITOR
GROUND
PLANE
COMPENSATION
CAPACITOR
GROUND
PLANE
(TOP VIEW)
BYPASS
CAPACITOR
METAL
C
COMP
Figure 7. Recommended Location of Critical
Components and Guard Ring
DRIVING 16-BIT ADCS
Low noise and adjustable compensation make the AD8021
especially suitable as a buffer/driver for high resolution analog-
to-digital converters.
As seen in TPC 15, the harmonic distortion is better than 90 dB at
frequencies between 100 kHz and 1 MHz. This is a real advantage
for complex waveforms that contain high frequency information,
as the phase and gain integrity of the sampled waveform can be
preserved throughout the conversion process. The increase in
loop gain results in improved output regulation and lower noise
when the converter input changes state during a sample. This
advantage is particularly apparent when using 16-bit high resolu-
tion ADCs with high sampling rates.
Figure 8 shows a typical ADC driver configuration. The AD8021
is in an inverting gain of –7.5, f
C
is 65 kHz, and its output voltage
is 10 V p-p. The results are listed in Table II.
50
5V
AD8021
+
–
–12V
+12V
AD7665
570kSPS
1
590
3
2
R
F
1.5k
IN
LO
IN
HI
6
C
C
5
10pF
56pF
R
G
200
65kHz
Figure 8. Inverting ADC Driver, Gain = –7.5, f
C
= 65 kHz